zynq_zed arm armv7 zynq xilinx zynq
zynq_cse_qspi arm armv7 zynq xilinx zynq zynq_cse:CSE_QSPI
zynq_cse_nand arm armv7 zynq xilinx zynq zynq_cse:CSE_NAND
+zynq_cse_nor arm armv7 zynq xilinx zynq zynq_cse:CSE_NOR
omap5_uevm arm armv7 omap5_uevm ti omap5
dra7xx_evm arm armv7 dra7xx ti omap5
s5p_goni arm armv7 goni samsung s5pc1xx
#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
/* TEXT BASE defines */
-#if defined(CONFIG_CSE_QSPI)
+#if defined(CONFIG_CSE_QSPI) || defined(CONFIG_CSE_NOR)
# define CONFIG_SYS_TEXT_BASE 0xFFFC4800
#elif defined(CONFIG_CSE_NAND)
# define CONFIG_SYS_TEXT_BASE 0x00100000
#elif defined(CONFIG_CSE_NAND)
# define CONFIG_NAND_ZYNQ
+#elif defined(CONFIG_CSE_NOR)
+#undef CONFIG_SYS_NO_FLASH
+
#endif
#include <configs/zynq_common.h>
# define CONFIG_SYS_SDRAM_BASE 0
# define CONFIG_ENV_SIZE 0x10000
+#elif defined(CONFIG_CSE_NOR)
+# define PHYS_SDRAM_1_SIZE (256 * 1024)
+# define CONFIG_SYS_SDRAM_BASE 0xFFFD0000
+# define CONFIG_ENV_SIZE 1400
+
#endif
#endif /* __CONFIG_ZYNQ_CSE_H */