]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
iommu/arm-smmu-v3: Update Arm errata
authorRobin Murphy <robin.murphy@arm.com>
Thu, 19 Mar 2026 15:24:34 +0000 (15:24 +0000)
committerWill Deacon <will@kernel.org>
Tue, 24 Mar 2026 13:46:36 +0000 (13:46 +0000)
MMU-700 r1p1 has subsequently fixed some of the errata for which we've
been applying the workarounds unconditionally, so we can now make those
conditional. However, there have also been some more new cases
identified where we must rely on range invalidation commands, and thus
still nominally avoid DVM being inadvertently enabled.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Documentation/arch/arm64/silicon-errata.rst
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

index 4c300caad90112d8bba72c73bf43e49e6e820915..c81d7fc2c68c0a3e1b948c370dc7090a443c312b 100644 (file)
@@ -207,8 +207,14 @@ stable kernels.
 +----------------+-----------------+-----------------+-----------------------------+
 | ARM            | MMU-600         | #1076982,1209401| N/A                         |
 +----------------+-----------------+-----------------+-----------------------------+
-| ARM            | MMU-700         | #2268618,2812531| N/A                         |
+| ARM            | MMU-700         | #2133013,       | N/A                         |
+|                |                 | #2268618,       |                             |
+|                |                 | #2812531,       |                             |
+|                |                 | #3777127        |                             |
 +----------------+-----------------+-----------------+-----------------------------+
+| ARM            | MMU L1          | #3878312        | N/A                         |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM            | MMU S3          | #3995052        | N/A                         |
 +----------------+-----------------+-----------------+-----------------------------+
 | ARM            | GIC-700         | #2941627        | ARM64_ERRATUM_2941627       |
 +----------------+-----------------+-----------------+-----------------------------+
index b841efbcc9e9b988c1941ca4e64dddeb939ffefe..f6901c5437edcb4efdb76fb6324e57130105f5b3 100644 (file)
@@ -4939,6 +4939,8 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu)
 #define IIDR_IMPLEMENTER_ARM           0x43b
 #define IIDR_PRODUCTID_ARM_MMU_600     0x483
 #define IIDR_PRODUCTID_ARM_MMU_700     0x487
+#define IIDR_PRODUCTID_ARM_MMU_L1      0x48a
+#define IIDR_PRODUCTID_ARM_MMU_S3      0x498
 
 static void arm_smmu_device_iidr_probe(struct arm_smmu_device *smmu)
 {
@@ -4963,11 +4965,19 @@ static void arm_smmu_device_iidr_probe(struct arm_smmu_device *smmu)
                                smmu->features &= ~ARM_SMMU_FEAT_NESTING;
                        break;
                case IIDR_PRODUCTID_ARM_MMU_700:
-                       /* Arm erratum 2812531 */
+                       /* Many errata... */
+                       smmu->features &= ~ARM_SMMU_FEAT_BTM;
+                       if (variant < 1 || revision < 1) {
+                               /* Arm erratum 2812531 */
+                               smmu->options |= ARM_SMMU_OPT_CMDQ_FORCE_SYNC;
+                               /* Arm errata 2268618, 2812531 */
+                               smmu->features &= ~ARM_SMMU_FEAT_NESTING;
+                       }
+                       break;
+               case IIDR_PRODUCTID_ARM_MMU_L1:
+               case IIDR_PRODUCTID_ARM_MMU_S3:
+                       /* Arm errata 3878312/3995052 */
                        smmu->features &= ~ARM_SMMU_FEAT_BTM;
-                       smmu->options |= ARM_SMMU_OPT_CMDQ_FORCE_SYNC;
-                       /* Arm errata 2268618, 2812531 */
-                       smmu->features &= ~ARM_SMMU_FEAT_NESTING;
                        break;
                }
                break;