Follow-up to cache reorg: update trace cache warning

Update trace cache warning so that it is the same as before the cache reorg
(avoid failure of some tests on Pentium4 as the warning output
must match what is filtered by cachegrind/tests/filter_stderr)

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13060

diff --git a/cachegrind/cg-arch.c b/cachegrind/cg-arch.c
index b59908a7fcef741ff39137297ed36f80e43530db..f3c6df46b2a540f71e1b024419e6d332c972d57f 100644 (file)
--- a/cachegrind/cg-arch.c
+++ b/cachegrind/cg-arch.c
@@ -327,10 +327,10 @@ configure_caches(cache_t *I1c, cache_t *D1c, cache_t *LLc,
          } else {
             adjusted_size = 32 * 1024;
          }
-         VG_(dmsg)("warning: %u KB micro-op instruction trace cache\n",
+         VG_(dmsg)("warning: Pentium 4 with %u KB micro-op instruction trace cache\n",
                    i1->sizeB / 1024);
          VG_(dmsg)("         Simulating a %d KB I-cache with %d B lines\n",
-                   adjusted_size, guessed_line_size);
+                   adjusted_size / 1024, guessed_line_size);
 
          *I1c = (cache_t) { adjusted_size, i1->assoc, guessed_line_size };
       } else {