Type casting cleanups.

git-svn-id: svn://svn.valgrind.org/vex/trunk@1248

diff --git a/VEX/Makefile-icc b/VEX/Makefile-icc
index 4195b029d7e5c9b5c3179d6dc9e31e7970fad8ed..22651fbc8158eabd252c0d31e1050160915316cd 100644 (file)
--- a/VEX/Makefile-icc
+++ b/VEX/Makefile-icc
@@ -19,6 +19,7 @@ PRIV_HEADERS =        priv/host-x86/hdefs.h                   \
                priv/main/vex_globals.h                 \
                priv/main/vex_util.h                    \
                priv/guest-generic/g_generic_x87.h      \
+                priv/guest-generic/bb_to_IR.h           \
                priv/guest-x86/gdefs.h                  \
                priv/guest-amd64/gdefs.h                \
                priv/guest-arm/gdefs.h                  \
@@ -44,6 +45,7 @@ LIB_OBJS =    priv/ir/irdefs.o                        \
                priv/host-generic/h_generic_simd64.o    \
                priv/host-generic/reg_alloc2.o          \
                priv/guest-generic/g_generic_x87.o      \
+                priv/guest-generic/bb_to_IR.o           \
                priv/guest-x86/ghelpers.o               \
                priv/guest-amd64/ghelpers.o             \
                priv/guest-arm/ghelpers.o               \
@@ -203,6 +205,10 @@ priv/guest-generic/g_generic_x87.o: $(ALL_HEADERS) priv/guest-generic/g_generic_
        $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-generic/g_generic_x87.o \
                                         -c priv/guest-generic/g_generic_x87.c
 
+priv/guest-generic/bb_to_IR.o: $(ALL_HEADERS) priv/guest-generic/bb_to_IR.c
+       $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-generic/bb_to_IR.o \
+                                        -c priv/guest-generic/bb_to_IR.c
+
 priv/guest-x86/ghelpers.o: $(ALL_HEADERS) priv/guest-x86/ghelpers.c
        $(CC) $(CCFLAGS) $(ALL_INCLUDES) -o priv/guest-x86/ghelpers.o \
                                         -c priv/guest-x86/ghelpers.c

diff --git a/VEX/priv/guest-arm/toIR.c b/VEX/priv/guest-arm/toIR.c
index 6801f881047edb9838a8f8c3cf43d429b516d07a..990c40b7f7283eea08f5666f37d8bd8290aa316d 100644 (file)
--- a/VEX/priv/guest-arm/toIR.c
+++ b/VEX/priv/guest-arm/toIR.c
@@ -241,7 +241,7 @@ IRBB* bbToIR_ARM ( UChar*           armCode,
       }
 
       delta += size;
-      vge->len[vge->n_used-1] += size;
+      vge->len[vge->n_used-1] = toUShort(vge->len[vge->n_used-1] + size);
       n_instrs++;
       DIP("\n");
 

diff --git a/VEX/priv/guest-ppc32/ghelpers.c b/VEX/priv/guest-ppc32/ghelpers.c
index 70480ee47d64337c7347697989dc07aa1bd05ba2..e6cf0fef21a1e377f2129ccc330ab886b95c265b 100644 (file)
--- a/VEX/priv/guest-ppc32/ghelpers.c
+++ b/VEX/priv/guest-ppc32/ghelpers.c
@@ -99,8 +99,8 @@ UInt ppc32g_calculate_xer_ov ( UInt op, UInt res, UInt argL, UInt argR )
    case PPC32G_FLAG_OP_MULLW: { // mullwo
       /* OV true if result can't be represented in 32 bits
          i.e sHi != sign extension of sLo */
-      Long l_res = (Long)((Int)argL) * (Long)((Int)argR);
-      Int sHi = (Int)(l_res >> 32);
+      Long l_res = ((Long)((Int)argL)) * ((Long)((Int)argR));
+      Int sHi = (Int)toUInt(l_res >> 32);
       Int sLo = (Int)l_res;
       return (sHi != (sLo >> /*s*/ 31)) ? 1:0;
    }

diff --git a/VEX/priv/guest-ppc32/toIR.c b/VEX/priv/guest-ppc32/toIR.c
index 5ea96447940b341238746478d181079efc3b9b84..c651ba789b8e18cad22bb5681b6bf756792e773e 100644 (file)
--- a/VEX/priv/guest-ppc32/toIR.c
+++ b/VEX/priv/guest-ppc32/toIR.c
@@ -274,7 +274,7 @@ static void unimplemented ( Char* str )
 
 static UChar extend_s_5to8 ( UChar x )
 {
-   return (UChar)((((Int)x) << 27) >> 27);
+   return toUChar((((Int)x) << 27) >> 27);
 }
 
 #if 0
@@ -808,7 +808,7 @@ static IRExpr* getReg_field ( PPC32SPR reg, UInt field_idx )
    fld = getReg_masked( reg, (0xF << (field_idx*4)) );
    
    if (field_idx != 0) {
-      fld = binop(Iop_Shr32, fld, mkU8(field_idx * 4));
+      fld = binop(Iop_Shr32, fld, mkU8(toUChar(field_idx * 4)));
    }
    return fld;
 }
@@ -818,13 +818,13 @@ static IRExpr* getReg_field ( PPC32SPR reg, UInt field_idx )
 static IRExpr* getReg_bit ( PPC32SPR reg, UInt bit_idx )
 {
    IRExpr* val;
-   vassert( bit_idx <= 32 );
+   vassert( bit_idx < 32 );
    vassert( reg < PPC32_SPR_MAX );
    
    val = getReg_masked( reg, 1<<bit_idx );
 
    if (bit_idx != 0) {
-      val = binop(Iop_Shr32, val, mkU8(bit_idx));
+      val = binop(Iop_Shr32, val, mkU8(toUChar(bit_idx)));
    }
    return val;
 }
@@ -955,7 +955,7 @@ static void putReg_field ( PPC32SPR reg, IRExpr* src, UInt field_idx )
    vassert( reg < PPC32_SPR_MAX );
    
    if (field_idx != 0) {
-      src = binop(Iop_Shl32, src, mkU8(field_idx * 4));
+      src = binop(Iop_Shl32, src, mkU8(toUChar(field_idx * 4)));
    }   
    putReg_masked( reg, src, (0xF << (field_idx*4)) );
 }
@@ -968,18 +968,12 @@ static void putReg_bit ( PPC32SPR reg, IRExpr* src, UInt bit_idx )
    vassert( reg < PPC32_SPR_MAX );
    
    if (bit_idx != 0) {
-      src = binop(Iop_Shl32, src, mkU8(bit_idx));
+      src = binop(Iop_Shl32, src, mkU8(toUChar(bit_idx)));
    }   
    putReg_masked( reg, src, (1<<bit_idx) );
 }
 
 
-
-
-
-
-
-
 /*------------------------------------------------------------*/
 /*--- Integer Instruction Translation                     --- */
 /*------------------------------------------------------------*/
@@ -1370,13 +1364,13 @@ static Bool dis_int_cmp ( UInt theInstr )
    switch (opc1) {
    case 0x0B: // cmpi (Compare Immediate, PPC32 p368)
       EXTS_SIMM = extend_s_16to32(SIMM_16);
-      DIP("cmpi crf%d,%u,r%d,0x%x\n", crfD, flag_L, Ra_addr, EXTS_SIMM);
+      DIP("cmpi crf%d,%d,r%d,0x%x\n", crfD, flag_L, Ra_addr, EXTS_SIMM);
       irx_cmp_lt = binop(Iop_CmpLT32S, mkexpr(Ra), mkU32(EXTS_SIMM));
       irx_cmp_eq = binop(Iop_CmpEQ32, mkexpr(Ra), mkU32(EXTS_SIMM));
       break;
           
    case 0x0A: // cmpli (Compare Logical Immediate, PPC32 p370)
-      DIP("cmpli crf%d,%u,r%d,0x%x\n", crfD, flag_L, Ra_addr, UIMM_16);
+      DIP("cmpli crf%d,%d,r%d,0x%x\n", crfD, flag_L, Ra_addr, UIMM_16);
       irx_cmp_lt = binop(Iop_CmpLT32U, mkexpr(Ra), mkU32(UIMM_16));
       irx_cmp_eq = binop(Iop_CmpEQ32, mkexpr(Ra), mkU32(UIMM_16));
       break;
@@ -1392,13 +1386,13 @@ static Bool dis_int_cmp ( UInt theInstr )
 
       switch (opc2) {
       case 0x000: // cmp (Compare, PPC32 p367)
-         DIP("cmp crf%d,%u,r%d,r%d\n", crfD, flag_L,
+         DIP("cmp crf%d,%d,r%d,r%d\n", crfD, flag_L,
              Ra_addr, Rb_addr);
          irx_cmp_lt = binop(Iop_CmpLT32S, mkexpr(Ra), mkexpr(Rb));
          break;
          
        case 0x020: // cmpl (Compare Logical, PPC32 p369)
-          DIP("cmpl crf%d,%u,r%d,r%d\n", crfD, flag_L,
+          DIP("cmpl crf%d,%d,r%d,r%d\n", crfD, flag_L,
               Ra_addr, Rb_addr);
           irx_cmp_lt = binop(Iop_CmpLT32U, mkexpr(Ra), mkexpr(Rb));
           break;
@@ -1642,7 +1636,7 @@ static Bool dis_int_rot ( UInt theInstr )
       
    switch (opc1) {
    case 0x14: // rlwimi (Rotate Left Word Immediate then Mask Insert, PPC32 p500)
-      DIP("rlwimi%s r%d,r%d,%d,%u,%u\n", flag_Rc ? "." : "",
+      DIP("rlwimi%s r%d,r%d,%d,%d,%d\n", flag_Rc ? "." : "",
           Ra_addr, Rs_addr, sh_imm, MaskBegin, MaskEnd);
       // Ra = (ROTL(Rs, Imm) & mask) | (Ra & ~mask);
       assign( Ra, binop(Iop_Or32,
@@ -1652,7 +1646,7 @@ static Bool dis_int_rot ( UInt theInstr )
       break;
 
    case 0x15: // rlwinm (Rotate Left Word Immediate then AND with Mask, PPC32 p501)
-      DIP("rlwinm%s r%d,r%d,%d,%u,%u\n", flag_Rc ? "." : "",
+      DIP("rlwinm%s r%d,r%d,%d,%d,%d\n", flag_Rc ? "." : "",
           Ra_addr, Rs_addr, sh_imm, MaskBegin, MaskEnd);
       // Ra = ROTL(Rs, Imm) & mask
       assign( Ra, binop(Iop_And32, ROTL32(mkexpr(Rs),
@@ -1660,7 +1654,7 @@ static Bool dis_int_rot ( UInt theInstr )
       break;
 
    case 0x17: // rlwnm (Rotate Left Word then AND with Mask, PPC32 p503
-      DIP("rlwnm%s r%d,r%d,r%d,%u,%u\n", flag_Rc ? "." : "",
+      DIP("rlwnm%s r%d,r%d,r%d,%d,%d\n", flag_Rc ? "." : "",
           Ra_addr, Rs_addr, Rb_addr, MaskBegin, MaskEnd);
       // Ra = ROTL(Rs, Rb[0-4]) & mask
       assign( rot_amt,
@@ -2147,7 +2141,7 @@ vassert(0);
             return False;
          }
       }
-      DIP("lswi r%d,r%d,%u\n", Rd_addr, Ra_addr, NumBytes);
+      DIP("lswi r%d,r%d,%d\n", Rd_addr, Ra_addr, NumBytes);
       
       assign( EA, mkexpr(b_EA) );
       
@@ -2182,7 +2176,7 @@ vassert(0);
    case 0x2D5: // stswi (Store String Word Immediate, PPC32 p528)
 vassert(0);
 
-      DIP("stswi r%d,r%d,%u\n", Rs_addr, Ra_addr, NumBytes);
+      DIP("stswi r%d,r%d,%d\n", Rs_addr, Ra_addr, NumBytes);
       if (Ra_addr == 0) {
          assign( EA, mkU32(0) );
       } else {
@@ -3286,7 +3280,7 @@ static Bool dis_fp_load ( UInt theInstr )
    /* D-Form */
    UInt  d_imm     =         (theInstr >>  0) & 0xFFFF; /* theInstr[0:15]  */
 
-   UInt exts_d_imm = extend_s_16to32(d_imm);
+   Int exts_d_imm  = extend_s_16to32(d_imm);
 
    IRTemp EA       = newTemp(Ity_I32);
    IRTemp rA       = newTemp(Ity_I32);
@@ -3299,7 +3293,7 @@ static Bool dis_fp_load ( UInt theInstr )
 
    switch(opc1) {
    case 0x30: // lfs (Load Float Single, PPC32 p441)
-      DIP("lfs fr%d,%d(r%d)\n", frD_addr, d_imm, rA_addr);
+      DIP("lfs fr%d,%d(r%d)\n", frD_addr, exts_d_imm, rA_addr);
       assign( EA, binop(Iop_Add32, mkU32(exts_d_imm), mkexpr(rA_or_0)) );
       putFReg( frD_addr, unop(Iop_F32toF64, loadBE(Ity_F32, mkexpr(EA))) );
       break;
@@ -3309,14 +3303,14 @@ static Bool dis_fp_load ( UInt theInstr )
          vex_printf("dis_fp_load(PPC32)(instr,lfsu)\n");
          return False;
       }
-      DIP("lfsu fr%d,%d(r%d)\n", frD_addr, d_imm, rA_addr);
+      DIP("lfsu fr%d,%d(r%d)\n", frD_addr, exts_d_imm, rA_addr);
       assign( EA, binop(Iop_Add32, mkU32(exts_d_imm), mkexpr(rA)) );
       putFReg( frD_addr, unop(Iop_F32toF64, loadBE(Ity_F32, mkexpr(EA))) );
       putIReg( rA_addr, mkexpr(EA) );
       break;
       
    case 0x32: // lfd (Load Float Double, PPC32 p437)
-      DIP("lfd fr%d,%d(r%d)\n", frD_addr, d_imm, rA_addr);
+      DIP("lfd fr%d,%d(r%d)\n", frD_addr, exts_d_imm, rA_addr);
       assign( EA, binop(Iop_Add32, mkU32(exts_d_imm), mkexpr(rA_or_0)) );
       putFReg( frD_addr, loadBE(Ity_F64, mkexpr(EA)) );
       break;
@@ -3326,7 +3320,7 @@ static Bool dis_fp_load ( UInt theInstr )
          vex_printf("dis_fp_load(PPC32)(instr,lfdu)\n");
          return False;
       }
-      DIP("lfdu fr%d,%d(r%d)\n", frD_addr, d_imm, rA_addr);
+      DIP("lfdu fr%d,%d(r%d)\n", frD_addr, exts_d_imm, rA_addr);
       assign( EA, binop(Iop_Add32, mkU32(exts_d_imm), mkexpr(rA)) );
       putFReg( frD_addr, loadBE(Ity_F64, mkexpr(EA)) );
       putIReg( rA_addr, mkexpr(EA) );
@@ -3404,7 +3398,7 @@ static Bool dis_fp_store ( UInt theInstr )
    /* D-Form */
    UInt  d_imm     =         (theInstr >>  0) & 0xFFFF; /* theInstr[0:15]  */
 
-   UInt exts_d_imm = extend_s_16to32(d_imm);
+   Int exts_d_imm  = extend_s_16to32(d_imm);
 
    IRTemp EA       = newTemp(Ity_I32);
    IRTemp frS      = newTemp(Ity_F64);
@@ -3419,7 +3413,7 @@ static Bool dis_fp_store ( UInt theInstr )
 
    switch(opc1) {
    case 0x34: // stfs (Store Float Single, PPC32 p518)
-      DIP("stfs fr%d,%d(r%d)\n", frS_addr, d_imm, rA_addr);
+      DIP("stfs fr%d,%d(r%d)\n", frS_addr, exts_d_imm, rA_addr);
       assign( EA, binop(Iop_Add32, mkU32(exts_d_imm), mkexpr(rA_or_0)) );
       storeBE( mkexpr(EA),
                binop(Iop_F64toF32, get_roundingmode(), mkexpr(frS)) );
@@ -3430,7 +3424,7 @@ static Bool dis_fp_store ( UInt theInstr )
          vex_printf("dis_fp_store(PPC32)(instr,stfsu)\n");
          return False;
       }
-      DIP("stfsu fr%d,%d(r%d)\n", frS_addr, d_imm, rA_addr);
+      DIP("stfsu fr%d,%d(r%d)\n", frS_addr, exts_d_imm, rA_addr);
       assign( EA, binop(Iop_Add32, mkU32(exts_d_imm), mkexpr(rA)) );
       storeBE( mkexpr(EA),
                binop(Iop_F64toF32, get_roundingmode(), mkexpr(frS)) );
@@ -3438,7 +3432,7 @@ static Bool dis_fp_store ( UInt theInstr )
       break;
 
    case 0x36: // stfd (Store Float Double, PPC32 p513)
-      DIP("stfd fr%d,%d(r%d)\n", frS_addr, d_imm, rA_addr);
+      DIP("stfd fr%d,%d(r%d)\n", frS_addr, exts_d_imm, rA_addr);
       assign( EA, binop(Iop_Add32, mkU32(exts_d_imm), mkexpr(rA_or_0)) );
       storeBE( mkexpr(EA), mkexpr(frS) );
       break;
@@ -3448,7 +3442,7 @@ static Bool dis_fp_store ( UInt theInstr )
          vex_printf("dis_fp_store(PPC32)(instr,stfdu)\n");
          return False;
       }
-      DIP("stfdu fr%d,%d(r%d)\n", frS_addr, d_imm, rA_addr);
+      DIP("stfdu fr%d,%d(r%d)\n", frS_addr, exts_d_imm, rA_addr);
       assign( EA, binop(Iop_Add32, mkU32(exts_d_imm), mkexpr(rA)) );
       storeBE( mkexpr(EA), mkexpr(frS) );
       putIReg( rA_addr, mkexpr(EA) );
@@ -5046,7 +5040,7 @@ static Bool dis_av_permute ( UInt theInstr )
          vex_printf("dis_av_permute(PPC32)(vsldoi)\n");
          return False;
       }
-      DIP("vsldoi v%d,v%d,v%d,%u\n", vD_addr, vA_addr, vB_addr, SHB_uimm4);
+      DIP("vsldoi v%d,v%d,v%d,%d\n", vD_addr, vA_addr, vB_addr, SHB_uimm4);
       DIP(" => not implemented\n");
       return False;
 
@@ -5090,17 +5084,17 @@ static Bool dis_av_permute ( UInt theInstr )
 
    /* Splat */
    case 0x20C: // vspltb (Splat Byte, AV p245)
-      DIP("vspltb v%d,v%d,%u\n", vD_addr, vB_addr, UIMM_5);
+      DIP("vspltb v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       DIP(" => not implemented\n");
       return False;
 
    case 0x24C: // vsplth (Splat Half Word, AV p246)
-      DIP("vsplth v%d,v%d,%u\n", vD_addr, vB_addr, UIMM_5);
+      DIP("vsplth v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       DIP(" => not implemented\n");
       return False;
 
    case 0x28C: // vspltw (Splat Word, AV p250)
-      DIP("vspltw v%d,v%d,%u\n", vD_addr, vB_addr, UIMM_5);
+      DIP("vspltw v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       DIP(" => not implemented\n");
       return False;
 
@@ -5395,22 +5389,22 @@ static Bool dis_av_fp_convert ( UInt theInstr )
 
    switch (opc2) {
    case 0x30A: // vcfux (Convert from Unsigned Fixed-Point W, AV p156)
-      DIP("vcfux v%d,v%d,%u\n", vD_addr, vB_addr, UIMM_5);
+      DIP("vcfux v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       DIP(" => not implemented\n");
       return False;
 
    case 0x34A: // vcfsx (Convert from Signed Fixed-Point W, AV p155)
-      DIP("vcfsx v%d,v%d,%u\n", vD_addr, vB_addr, UIMM_5);
+      DIP("vcfsx v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       DIP(" => not implemented\n");
       return False;
 
    case 0x38A: // vctuxs (Convert to Unsigned Fixed-Point W Saturate, AV p172)
-      DIP("vctuxs v%d,v%d,%u\n", vD_addr, vB_addr, UIMM_5);
+      DIP("vctuxs v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       DIP(" => not implemented\n");
       return False;
 
    case 0x3CA: // vctsxs (Convert to Signed Fixed-Point W Saturate, AV p171)
-      DIP("vctsxs v%d,v%d,%u\n", vD_addr, vB_addr, UIMM_5);
+      DIP("vctsxs v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       DIP(" => not implemented\n");
       return False;
 

diff --git a/VEX/priv/host-ppc32/hdefs.c b/VEX/priv/host-ppc32/hdefs.c
index d465ecfd7e251018bfd99813f0f6639d65052592..36a92a56c09ed95d03a08966eebf0c04bfde101a 100644 (file)
--- a/VEX/priv/host-ppc32/hdefs.c
+++ b/VEX/priv/host-ppc32/hdefs.c
@@ -1321,12 +1321,14 @@ void ppPPC32Instr ( PPC32Instr* i )
       ppHRegPPC32(i->Pin.AvShlDbl.srcL);
       vex_printf(",");
       ppHRegPPC32(i->Pin.AvShlDbl.srcR);
-      vex_printf(",%u", i->Pin.AvShlDbl.shift);
+      vex_printf(",%d", i->Pin.AvShlDbl.shift);
       return;
 
    case Pin_AvSplat: {
-      UChar ch_sz = (i->Pin.AvSplat.sz == 8) ? 'b' :
-                    (i->Pin.AvSplat.sz == 16) ? 'h' : 'w';
+      UChar ch_sz = toUChar(
+                       (i->Pin.AvSplat.sz == 8) ? 'b' :
+                       (i->Pin.AvSplat.sz == 16) ? 'h' : 'w'
+                    );
       vex_printf("vsplt%s%c ",
                  i->Pin.AvSplat.src->tag == Pri_Imm ? "is" : "", ch_sz);
       ppHRegPPC32(i->Pin.AvSplat.dst);

diff --git a/VEX/priv/host-ppc32/isel.c b/VEX/priv/host-ppc32/isel.c
index 4a9e58bc03648a90ef353498a2673de1a56486b3..3b89ca41decb6e14f0618aeca81ce1ff54c44be0 100644 (file)
--- a/VEX/priv/host-ppc32/isel.c
+++ b/VEX/priv/host-ppc32/isel.c
@@ -706,7 +706,7 @@ void doHelperCall ( ISelEnv* env,
 
    /* Finally, the call itself. */
    addInstr(env, PPC32Instr_Call( cc,
-                                  Ptr_to_ULong(cee->addr),
+                                  (Addr32)toUInt(Ptr_to_ULong(cee->addr)),
                                   n_args + (passBBP ? 1 : 0) ));
 }
 
@@ -915,8 +915,8 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
       if (e->Iex.Load.end != Iend_BE)
          goto irreducible;
       if (ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32) {
-         addInstr(env, PPC32Instr_Load( 
-                          sizeofIRType(ty), False, r_dst, am_addr ));
+         addInstr(env, PPC32Instr_Load( toUChar(sizeofIRType(ty)), 
+                                        False, r_dst, am_addr ));
          return r_dst;
       }
       break;
@@ -1385,7 +1385,8 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
       if (ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32) {
          HReg r_dst = newVRegI(env);
          PPC32AMode* am_addr = PPC32AMode_IR(e->Iex.Get.offset, GuestStatePtr );
-         addInstr(env, PPC32Instr_Load( sizeofIRType(ty), False, r_dst, am_addr ));
+         addInstr(env, PPC32Instr_Load( toUChar(sizeofIRType(ty)), 
+                                        False, r_dst, am_addr ));
          return r_dst;
       }
       break;
@@ -1477,21 +1478,25 @@ static Bool fits16bits ( UInt u )
    Int i = u & 0xFFFF;
    i <<= 16;
    i >>= 16;
-   return u == (UInt)i;
+   return toBool(u == (UInt)i);
 }
 
 static Bool sane_AMode ( PPC32AMode* am )
 {
    switch (am->tag) {
    case Pam_IR:
-      return (hregClass(am->Pam.IR.base) == HRcInt32
-              && hregIsVirtual(am->Pam.IR.base)
-              && fits16bits(am->Pam.IR.index));
+      return toBool(
+                hregClass(am->Pam.IR.base) == HRcInt32
+                && hregIsVirtual(am->Pam.IR.base)
+                && fits16bits(am->Pam.IR.index)
+             );
    case Pam_RR:
-      return (hregClass(am->Pam.RR.base) == HRcInt32
-              && hregIsVirtual(am->Pam.IR.base)
-              && hregClass(am->Pam.RR.base) == HRcInt32
-              && hregIsVirtual(am->Pam.IR.base));
+      return toBool(
+                hregClass(am->Pam.RR.base) == HRcInt32
+                && hregIsVirtual(am->Pam.IR.base)
+                && hregClass(am->Pam.RR.base) == HRcInt32
+                && hregIsVirtual(am->Pam.IR.base)
+             );
    default:
       vpanic("sane_AMode: unknown ppc32 amode tag");
    }
@@ -1939,7 +1944,7 @@ static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e )
             which. */
          HReg     tLo     = newVRegI(env);
          HReg     tHi     = newVRegI(env);
-         Bool     syned   = e->Iex.Binop.op == Iop_MullS32;
+         Bool     syned   = toBool(e->Iex.Binop.op == Iop_MullS32);
          HReg     r_srcL  = iselIntExpr_R(env, e->Iex.Binop.arg1);
 
 // CAB: could do better than this...
@@ -2468,7 +2473,7 @@ static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e )
 //..       return;
 //..    }
 
-   vex_printf("iselInt64Expr(ppc32): No such tag(%d)\n", e->tag);
+   vex_printf("iselInt64Expr(ppc32): No such tag(%u)\n", e->tag);
    ppIRExpr(e);
    vpanic("iselInt64Expr(ppc32)");
 }
@@ -2546,7 +2551,7 @@ static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e )
 //..       return dst;
 //..    }
 
-   vex_printf("iselFltExpr(ppc32): No such tag(%d)\n", e->tag);
+   vex_printf("iselFltExpr(ppc32): No such tag(%u)\n", e->tag);
    ppIRExpr(e);
    vpanic("iselFltExpr_wrk(ppc32)");
 }
@@ -2783,7 +2788,7 @@ static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e )
       }
    }
 
-   vex_printf("iselDblExpr(ppc32): No such tag(%d)\n", e->tag);
+   vex_printf("iselDblExpr(ppc32): No such tag(%u)\n", e->tag);
    ppIRExpr(e);
    vpanic("iselDblExpr_wrk(ppc32)");
 }
@@ -3301,7 +3306,8 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
       am_addr = iselIntExpr_AMode(env, stmt->Ist.Store.addr);
       if (tyd == Ity_I8 || tyd == Ity_I16 || tyd == Ity_I32) {
          HReg r_src = iselIntExpr_R(env, stmt->Ist.Store.data);
-         addInstr(env, PPC32Instr_Store(sizeofIRType(tyd), am_addr, r_src));
+         addInstr(env, PPC32Instr_Store( toUChar(sizeofIRType(tyd)), 
+                                         am_addr, r_src));
          return;
       }
       if (tyd == Ity_F64) {
@@ -3338,7 +3344,8 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
       if (ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32) {
          HReg r_src = iselIntExpr_R(env, stmt->Ist.Put.data);
          PPC32AMode* am_addr = PPC32AMode_IR(stmt->Ist.Put.offset, GuestStatePtr);
-         addInstr(env, PPC32Instr_Store( sizeofIRType(ty), am_addr, r_src ));
+         addInstr(env, PPC32Instr_Store( toUChar(sizeofIRType(ty)), 
+                                         am_addr, r_src ));
          return;
       }
       if (ty == Ity_I64) {
@@ -3454,7 +3461,7 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
 
       if (d->nFxState == 0)
          vassert(!d->needsBBP);
-      passBBP = d->nFxState > 0 && d->needsBBP;
+      passBBP = toBool(d->nFxState > 0 && d->needsBBP);
 
       /* Marshal args, do the call, clear stack. */
       doHelperCall( env, passBBP, d->guard, d->cee, d->args );