arm64: dts: imx95-15x15-evk: Change pinctrl settings for usdhc2

The drive strength is too high for SDR104 mode. Change the drive
strength to X3 as hardware team recommends.

Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
index de7f4321e5f9d7d6a6c46741d3710756dd2b69cf..3c23022923e68fe0f5205d322ad6f8834a46dc56 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
@@ -881,12 +881,12 @@
 
        pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
                fsl,pins = <
-                       IMX95_PAD_SD2_CLK__USDHC2_CLK                           0x15fe
-                       IMX95_PAD_SD2_CMD__USDHC2_CMD                           0x13fe
-                       IMX95_PAD_SD2_DATA0__USDHC2_DATA0                       0x13fe
-                       IMX95_PAD_SD2_DATA1__USDHC2_DATA1                       0x13fe
-                       IMX95_PAD_SD2_DATA2__USDHC2_DATA2                       0x13fe
-                       IMX95_PAD_SD2_DATA3__USDHC2_DATA3                       0x13fe
+                       IMX95_PAD_SD2_CLK__USDHC2_CLK                           0x158e
+                       IMX95_PAD_SD2_CMD__USDHC2_CMD                           0x138e
+                       IMX95_PAD_SD2_DATA0__USDHC2_DATA0                       0x138e
+                       IMX95_PAD_SD2_DATA1__USDHC2_DATA1                       0x138e
+                       IMX95_PAD_SD2_DATA2__USDHC2_DATA2                       0x138e
+                       IMX95_PAD_SD2_DATA3__USDHC2_DATA3                       0x138e
                        IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT                   0x51e
                >;
        };