clk: mediatek: add array size fields to clk trees

Add num_plls, num_fclks, num_fdivs, num_muxes, and num_gates fields to
the mtk_clk_tree struct and populate them in the clk trees for all
existing drivers.

Currently, there is no bounds checking when accessing the arrays in
the clk tree structs. Adding these fields will allow for bounds checking
in the future.

Signed-off-by: David Lechner <dlechner@baylibre.com>

diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c
index 23b9787612a8bc1fbc8e721e705d1cf238c9026e..ccad3820c1bd957f9e6124840c882e97ebd8a3da 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -604,6 +604,8 @@ static const struct mtk_clk_tree mt7622_apmixed_clk_tree = {
        .plls = apmixed_plls,
        .gates_offs = CLK_APMIXED_MAIN_CORE_EN,
        .gates = apmixed_cgs,
+       .num_plls = ARRAY_SIZE(apmixed_plls),
+       .num_gates = ARRAY_SIZE(apmixed_cgs),
 };
 
 static const struct mtk_clk_tree mt7622_infra_clk_tree = {
@@ -612,6 +614,8 @@ static const struct mtk_clk_tree mt7622_infra_clk_tree = {
        .gates_offs = CLK_INFRA_DBGCLK_PD,
        .muxes = infra_muxes,
        .gates = infra_cgs,
+       .num_muxes = ARRAY_SIZE(infra_muxes),
+       .num_gates = ARRAY_SIZE(infra_cgs),
 };
 
 static const struct mtk_clk_tree mt7622_peri_clk_tree = {
@@ -620,6 +624,8 @@ static const struct mtk_clk_tree mt7622_peri_clk_tree = {
        .gates_offs = CLK_PERI_THERM_PD,
        .muxes = peri_muxes,
        .gates = peri_cgs,
+       .num_muxes = ARRAY_SIZE(peri_muxes),
+       .num_gates = ARRAY_SIZE(peri_cgs),
 };
 
 static const struct mtk_clk_tree mt7622_clk_tree = {
@@ -629,6 +635,9 @@ static const struct mtk_clk_tree mt7622_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_fixed_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
 };
 
 static int mt7622_mcucfg_probe(struct udevice *dev)

diff --git a/drivers/clk/mediatek/clk-mt7623.c b/drivers/clk/mediatek/clk-mt7623.c
index d0b80f48b0a5e80a0f44b7d0a425fda24910149f..cfc711ad216ce61dddc20b6e72e09397111afaf8 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7623.c
+++ b/drivers/clk/mediatek/clk-mt7623.c
@@ -997,6 +997,7 @@ static const struct mtk_clk_tree mt7623_apmixedsys_clk_tree = {
        .xtal2_rate = 26 * MHZ,
        .id_offs_map = pll_id_offs_map,
        .plls = apmixed_plls,
+       .num_plls = ARRAY_SIZE(apmixed_plls),
 };
 
 static const struct mtk_clk_tree mt7623_topckgen_clk_tree = {
@@ -1007,6 +1008,9 @@ static const struct mtk_clk_tree mt7623_topckgen_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_fixed_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
 };
 
 static int mt7623_mcucfg_probe(struct udevice *dev)
@@ -1063,6 +1067,8 @@ static const struct mtk_clk_tree mt7623_clk_peri_tree = {
        .gates_offs = peri_id_offs_map[CLK_PERI_NFI],
        .muxes = peri_muxes,
        .gates = peri_cgs,
+       .num_muxes = ARRAY_SIZE(peri_muxes),
+       .num_gates = ARRAY_SIZE(peri_cgs),
        .xtal_rate = 26 * MHZ,
 };
 

diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c
index 94fc5e514562757897f5d4a628cf71969932343f..e0eff01561cef0f44e70bb74ed7d8b79e61bcb9d 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -572,6 +572,10 @@ static const struct mtk_clk_tree mt7629_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
+       .num_plls = ARRAY_SIZE(apmixed_plls),
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_fixed_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
 };
 
 static const struct mtk_clk_tree mt7629_peri_clk_tree = {
@@ -584,6 +588,10 @@ static const struct mtk_clk_tree mt7629_peri_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
+       .num_plls = ARRAY_SIZE(apmixed_plls),
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_fixed_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
 };
 
 static int mt7629_mcucfg_probe(struct udevice *dev)

diff --git a/drivers/clk/mediatek/clk-mt7981.c b/drivers/clk/mediatek/clk-mt7981.c
index 2fdb1845e9f006ddcfd08e935fd1591ab5686fea..f854f079c672f2c000b63c79695188c56c1b2ed3 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7981.c
+++ b/drivers/clk/mediatek/clk-mt7981.c
@@ -513,6 +513,7 @@ static const struct mtk_clk_tree mt7981_fixed_pll_clk_tree = {
        .fdivs_offs = CLK_APMIXED_NR_CLK,
        .xtal_rate = 40 * MHZ,
        .fclks = fixed_pll_clks,
+       .num_fclks = ARRAY_SIZE(fixed_pll_clks),
 };
 
 static const struct mtk_clk_tree mt7981_topckgen_clk_tree = {
@@ -521,6 +522,9 @@ static const struct mtk_clk_tree mt7981_topckgen_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_fixed_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
        .flags = CLK_BYPASS_XTAL | CLK_PARENT_TOPCKGEN,
 };
 
@@ -531,6 +535,9 @@ static const struct mtk_clk_tree mt7981_infracfg_clk_tree = {
        .fdivs = infra_fixed_divs,
        .muxes = infra_muxes,
        .gates = infracfg_gates,
+       .num_fdivs = ARRAY_SIZE(infra_fixed_divs),
+       .num_muxes = ARRAY_SIZE(infra_muxes),
+       .num_gates = ARRAY_SIZE(infracfg_gates),
        .flags = CLK_PARENT_INFRASYS,
 };
 

diff --git a/drivers/clk/mediatek/clk-mt7986.c b/drivers/clk/mediatek/clk-mt7986.c
index 16db5877056c308de4294f8180d2dd1b3e12526d..257f89b7daa58756b40da09158fa8e47b5b9ffba 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -519,6 +519,7 @@ static const struct mtk_clk_tree mt7986_fixed_pll_clk_tree = {
        .fdivs_offs = CLK_APMIXED_NR_CLK,
        .xtal_rate = 40 * MHZ,
        .fclks = fixed_pll_clks,
+       .num_fclks = ARRAY_SIZE(fixed_pll_clks),
        .flags = CLK_PARENT_APMIXED,
 };
 
@@ -528,6 +529,9 @@ static const struct mtk_clk_tree mt7986_topckgen_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_fixed_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
        .flags = CLK_BYPASS_XTAL | CLK_PARENT_TOPCKGEN,
 };
 
@@ -538,6 +542,9 @@ static const struct mtk_clk_tree mt7986_infracfg_clk_tree = {
        .fdivs = infra_fixed_divs,
        .muxes = infra_muxes,
        .gates = infracfg_gates,
+       .num_fdivs = ARRAY_SIZE(infra_fixed_divs),
+       .num_muxes = ARRAY_SIZE(infra_muxes),
+       .num_gates = ARRAY_SIZE(infracfg_gates),
        .flags = CLK_PARENT_INFRASYS,
 };
 

diff --git a/drivers/clk/mediatek/clk-mt7987.c b/drivers/clk/mediatek/clk-mt7987.c
index caee8bf43e4fa3803dc5de5583e585162a30ed61..b559152c045b90de5cebb1afdef2525cdb873bf1 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7987.c
+++ b/drivers/clk/mediatek/clk-mt7987.c
@@ -46,6 +46,7 @@ static const struct mtk_fixed_clk apmixedsys_mtk_plls[] = {
 static const struct mtk_clk_tree mt7987_fixed_pll_clk_tree = {
        .fdivs_offs = ARRAY_SIZE(apmixedsys_mtk_plls),
        .fclks = apmixedsys_mtk_plls,
+       .num_fclks = ARRAY_SIZE(apmixedsys_mtk_plls),
        .flags = CLK_PARENT_APMIXED,
        .xtal_rate = 40 * MHZ,
 };
@@ -442,6 +443,8 @@ static const struct mtk_clk_tree mt7987_topckgen_clk_tree = {
        .muxes_offs = CLK_TOP_NETSYS_SEL,
        .fdivs = topckgen_mtk_fixed_factors,
        .muxes = topckgen_mtk_muxes,
+       .num_fdivs = ARRAY_SIZE(topckgen_mtk_fixed_factors),
+       .num_muxes = ARRAY_SIZE(topckgen_mtk_muxes),
        .flags = CLK_BYPASS_XTAL | CLK_PARENT_TOPCKGEN,
        .xtal_rate = MT7987_XTAL_RATE,
 };
@@ -765,6 +768,8 @@ static const struct mtk_clk_tree mt7987_infracfg_clk_tree = {
        .gates_offs = CLK_INFRA_66M_GPT_BCK,
        .muxes = infracfg_mtk_mux,
        .gates = infracfg_mtk_gates,
+       .num_muxes = ARRAY_SIZE(infracfg_mtk_mux),
+       .num_gates = ARRAY_SIZE(infracfg_mtk_gates),
        .flags = CLK_BYPASS_XTAL,
        .xtal_rate = MT7987_XTAL_RATE,
 };

diff --git a/drivers/clk/mediatek/clk-mt7988.c b/drivers/clk/mediatek/clk-mt7988.c
index bfbf401eb1292f2b7055838e89f7e168771e853f..56f3e5ebdff5aff2489cca6a179615961a10b8f2 100644 (file)
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -773,6 +773,7 @@ static const struct mtk_gate infracfg_mtk_gates[] = {
 static const struct mtk_clk_tree mt7988_fixed_pll_clk_tree = {
        .fdivs_offs = ARRAY_SIZE(apmixedsys_mtk_plls),
        .fclks = apmixedsys_mtk_plls,
+       .num_fclks = ARRAY_SIZE(apmixedsys_mtk_plls),
        .flags = CLK_PARENT_APMIXED,
        .xtal_rate = 40 * MHZ,
 };
@@ -783,6 +784,9 @@ static const struct mtk_clk_tree mt7988_topckgen_clk_tree = {
        .fclks = topckgen_mtk_fixed_clks,
        .fdivs = topckgen_mtk_fixed_factors,
        .muxes = topckgen_mtk_muxes,
+       .num_fclks = ARRAY_SIZE(topckgen_mtk_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(topckgen_mtk_fixed_factors),
+       .num_muxes = ARRAY_SIZE(topckgen_mtk_muxes),
        .flags = CLK_BYPASS_XTAL | CLK_PARENT_TOPCKGEN,
        .xtal_rate = 40 * MHZ,
 };
@@ -792,6 +796,8 @@ static const struct mtk_clk_tree mt7988_infracfg_clk_tree = {
        .gates_offs = CLK_INFRA_PCIE_PERI_26M_CK_P0,
        .muxes = infracfg_mtk_mux,
        .gates = infracfg_mtk_gates,
+       .num_muxes = ARRAY_SIZE(infracfg_mtk_mux),
+       .num_gates = ARRAY_SIZE(infracfg_mtk_gates),
        .flags = CLK_BYPASS_XTAL,
        .xtal_rate = 40 * MHZ,
 };

diff --git a/drivers/clk/mediatek/clk-mt8183.c b/drivers/clk/mediatek/clk-mt8183.c
index 9612a62e56a70c9049644bcd7e58e33eb0372967..7a1953ef6fd62dde35ee5640fa376c5b9de7e9db 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8183.c
+++ b/drivers/clk/mediatek/clk-mt8183.c
@@ -599,6 +599,10 @@ static const struct mtk_clk_tree mt8183_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
+       .num_plls = ARRAY_SIZE(apmixed_plls),
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_fixed_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
 };
 
 static const struct mtk_gate_regs infra0_cg_regs = {

diff --git a/drivers/clk/mediatek/clk-mt8188.c b/drivers/clk/mediatek/clk-mt8188.c
index 55dfadddfe3cf743602533de30275bc93d4f15a5..186638fcb662d0dae5840a5367a93935e94dbfcd 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8188.c
+++ b/drivers/clk/mediatek/clk-mt8188.c
@@ -85,6 +85,7 @@ static const struct mtk_clk_tree mt8188_apmixedsys_clk_tree = {
        .xtal_rate = 26 * MHZ,
        .xtal2_rate = 26 * MHZ,
        .plls = apmixed_plls,
+       .num_plls = ARRAY_SIZE(apmixed_plls),
 };
 
 static const struct mtk_fixed_clk top_fixed_clks[] = {
@@ -1364,6 +1365,9 @@ static const struct mtk_clk_tree mt8188_topckgen_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_fixed_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
 };
 
 static const struct mtk_gate_regs infra_ao0_cg_regs = {

diff --git a/drivers/clk/mediatek/clk-mt8365.c b/drivers/clk/mediatek/clk-mt8365.c
index 53eca73b98d8b7de068fc87a02192da9b9bc1189..7897044e1adcbd9fceeac22db342d58a1dac990d 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8365.c
+++ b/drivers/clk/mediatek/clk-mt8365.c
@@ -490,6 +490,10 @@ static const struct mtk_clk_tree mt8365_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_divs,
        .muxes = top_muxes,
+       .num_plls = ARRAY_SIZE(apmixed_plls),
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
 };
 
 /* topckgen cg */

diff --git a/drivers/clk/mediatek/clk-mt8512.c b/drivers/clk/mediatek/clk-mt8512.c
index ab27067344288fd5127a17b392db9e096cd0a9b0..6d98403bc451e9881e94675294c1f2f094435d25 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8512.c
+++ b/drivers/clk/mediatek/clk-mt8512.c
@@ -790,6 +790,10 @@ static const struct mtk_clk_tree mt8512_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
+       .num_plls = ARRAY_SIZE(apmixed_plls),
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_fixed_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
 };
 
 static int mt8512_apmixedsys_probe(struct udevice *dev)

diff --git a/drivers/clk/mediatek/clk-mt8516.c b/drivers/clk/mediatek/clk-mt8516.c
index 623f88499f1b0be2bd2b832d70cd10565eadfe18..c21b9894ad687cb7430d86a2c731334a6726b538 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8516.c
+++ b/drivers/clk/mediatek/clk-mt8516.c
@@ -739,6 +739,10 @@ static const struct mtk_clk_tree mt8516_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
+       .num_plls = ARRAY_SIZE(apmixed_plls),
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_fixed_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
 };
 
 static int mt8516_apmixedsys_probe(struct udevice *dev)

diff --git a/drivers/clk/mediatek/clk-mt8518.c b/drivers/clk/mediatek/clk-mt8518.c
index ba8cc584d46f73dc06899c5c22a7bcff230c11f1..48ef209ebbdd711c414bf8b52e2d3048697350f2 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8518.c
+++ b/drivers/clk/mediatek/clk-mt8518.c
@@ -1495,6 +1495,10 @@ static const struct mtk_clk_tree mt8518_clk_tree = {
        .fclks = top_fixed_clks,
        .fdivs = top_fixed_divs,
        .muxes = top_muxes,
+       .num_plls = ARRAY_SIZE(apmixed_plls),
+       .num_fclks = ARRAY_SIZE(top_fixed_clks),
+       .num_fdivs = ARRAY_SIZE(top_fixed_divs),
+       .num_muxes = ARRAY_SIZE(top_muxes),
 };
 
 static int mt8518_apmixedsys_probe(struct udevice *dev)

diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index 8ce7e52fd605b5ffea08842733b54000ab0b7a3b..a4a3307e576f402e6cd8d869c859b0d46ba5a452 100644 (file)
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -260,6 +260,11 @@ struct mtk_clk_tree {
        const struct mtk_fixed_factor *fdivs;
        const struct mtk_composite *muxes;
        const struct mtk_gate *gates;
+       const int num_plls;
+       const int num_fclks;
+       const int num_fdivs;
+       const int num_muxes;
+       const int num_gates;
        u32 flags;
 };