]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
wifi: rtw89: ser: post-recover DMAC state to prevent LPS
authorZong-Zhe Yang <kevin_yang@realtek.com>
Fri, 13 Feb 2026 06:15:52 +0000 (14:15 +0800)
committerPing-Ke Shih <pkshih@realtek.com>
Tue, 3 Mar 2026 02:40:30 +0000 (10:40 +0800)
If entering LPS during SER (system error recovery), IMR might fail to
be re-enabled after SER. Then, the next SER would not be noticed well.
After FW v0.35.100.0, Wi-Fi 7 chipsets adjust the order in which SER
recovers DMAC state to prevent LPS from being in the middle of SER.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260213061552.29997-13-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/fw.c
drivers/net/wireless/realtek/rtw89/mac.c

index 5d1cec20bc80c8ba6d1858cafa5c03543d82eda6..cf0cc718f41cc8883a06db9ae528edd9a148f4c0 100644 (file)
@@ -4796,6 +4796,7 @@ enum rtw89_fw_feature {
        RTW89_FW_FEATURE_SER_L1_BY_EVENT,
        RTW89_FW_FEATURE_SIM_SER_L0L1_BY_HALT_H2C,
        RTW89_FW_FEATURE_LPS_ML_INFO_V1,
+       RTW89_FW_FEATURE_SER_POST_RECOVER_DMAC,
 
        NUM_OF_RTW89_FW_FEATURES,
 };
index 99084a6e10a56bd8eed1096a4d1dd97f9eac73f9..45d8c5e70084840b975835feda2eb23272c46bca 100644 (file)
@@ -923,6 +923,7 @@ static const struct __fw_feat_cfg fw_feat_tbl[] = {
        __CFG_FW_FEAT(RTL8922A, ge, 0, 35, 84, 0, RFK_PRE_NOTIFY_MCC_V1),
        __CFG_FW_FEAT(RTL8922A, lt, 0, 35, 84, 0, ADDR_CAM_V0),
        __CFG_FW_FEAT(RTL8922A, ge, 0, 35, 97, 0, SIM_SER_L0L1_BY_HALT_H2C),
+       __CFG_FW_FEAT(RTL8922A, ge, 0, 35, 100, 0, SER_POST_RECOVER_DMAC),
 };
 
 static void rtw89_fw_iterate_feature_cfg(struct rtw89_fw_info *fw,
index e1cea0f884063f638adfcfd7195ae64ab8afa82a..234928613ef47dec10e1030340b2627445f0b09d 100644 (file)
@@ -826,7 +826,9 @@ u32 rtw89_mac_get_err_status(struct rtw89_dev *rtwdev)
        }
 
        err = rtw89_read32(rtwdev, R_AX_HALT_C2H);
-       rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0);
+
+       if (!RTW89_CHK_FW_FEATURE(SER_POST_RECOVER_DMAC, &rtwdev->fw))
+               rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0);
 
        err_scnr = RTW89_ERROR_SCENARIO(err);
        if (err_scnr == RTW89_WCPU_CPU_EXCEPTION)
@@ -846,6 +848,9 @@ bottom:
        if (chip->chip_gen != RTW89_CHIP_AX)
                rtw89_write32(rtwdev, R_AX_HALT_C2H, 0);
 
+       if (RTW89_CHK_FW_FEATURE(SER_POST_RECOVER_DMAC, &rtwdev->fw))
+               rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0);
+
        return err;
 }
 EXPORT_SYMBOL(rtw89_mac_get_err_status);