arm64: dts: ti: k3-j784s4-j742s2-ti-ipc-firmware-common: Refactor IPC cfg into new...

The TI K3 J784S4/J742S2 SoCs have multiple programmable remote
processors like R5F, C7x etc. The TI SDKs for J784S4/J742S2 SoCs offer
sample firmwares which could be run on these cores to demonstrate an
"echo" IPC test. Those firmware require certain memory carveouts to be
reserved from system memory, timers to be reserved, and certain mailbox
configurations for interrupt based messaging. These configurations could
be different for a different firmware.

While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Link: https://patch.msgid.link/20250908142826.1828676-28-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index 60817c1f310423122a8fa9fbf8587fa8aac7bd7c..3be74d828d84c665e5ade8820e1a69f09a003ea1 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -61,126 +61,6 @@
                        no-map;
                };
 
-               mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               mcu_r5fss0_core1_memory_region: memory@a1100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss0_core0_dma_memory_region: memory@a2000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core0_memory_region: memory@a2100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_dma_memory_region: memory@a3000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_memory_region: memory@a3100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_dma_memory_region: memory@a4000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_memory_region: memory@a4100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_dma_memory_region: memory@a5000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa5000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_memory_region: memory@a5100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa5100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss2_core0_dma_memory_region: memory@a6000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa6000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss2_core0_memory_region: memory@a6100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa6100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss2_core1_dma_memory_region: memory@a7000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa7000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss2_core1_memory_region: memory@a7100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa7100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               c71_0_dma_memory_region: memory@a8000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa8000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c71_0_memory_region: memory@a8100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa8100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               c71_1_dma_memory_region: memory@a9000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa9000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c71_1_memory_region: memory@a9100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa9100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               c71_2_dma_memory_region: memory@aa000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xaa000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c71_2_memory_region: memory@aa100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xaa100000 0x00 0xf00000>;
-                       no-map;
-               };
-
                c71_3_dma_memory_region: memory@ab000000 {
                        compatible = "shared-dma-pool";
                        reg = <0x00 0xab000000 0x00 0x100000>;
@@ -640,84 +520,7 @@
        bootph-all;
 };
 
-&mailbox0_cluster0 {
-       status = "okay";
-       interrupts = <436>;
-       mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster1 {
-       status = "okay";
-       interrupts = <432>;
-       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster2 {
-       status = "okay";
-       interrupts = <428>;
-       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster3 {
-       status = "okay";
-       interrupts = <424>;
-       mbox_main_r5fss2_core0: mbox-main-r5fss2-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss2_core1: mbox-main-r5fss2-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster4 {
-       status = "okay";
-       interrupts = <420>;
-       mbox_c71_0: mbox-c71-0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_c71_1: mbox-c71-1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
 &mailbox0_cluster5 {
-       status = "okay";
-       interrupts = <416>;
-       mbox_c71_2: mbox-c71-2 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
        mbox_c71_3: mbox-c71-3 {
                ti,mbox-rx = <2 0 0>;
                ti,mbox-tx = <3 0 0>;
@@ -992,143 +795,6 @@
        bootph-all;
 };
 
-&mcu_r5fss0 {
-       status = "okay";
-};
-
-&mcu_r5fss0_core0 {
-       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
-       memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
-                       <&mcu_r5fss0_core0_memory_region>;
-       status = "okay";
-};
-
-&mcu_r5fss0_core1 {
-       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
-       memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
-                       <&mcu_r5fss0_core1_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss0 {
-       ti,cluster-mode = <0>;
-       status = "okay";
-};
-
-&main_r5fss1 {
-       ti,cluster-mode = <0>;
-       status = "okay";
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
-       status = "reserved";
-};
-
-&main_timer1 {
-       status = "reserved";
-};
-
-&main_timer2 {
-       status = "reserved";
-};
-
-&main_timer3 {
-       status = "reserved";
-};
-
-&main_timer4 {
-       status = "reserved";
-};
-
-&main_timer5 {
-       status = "reserved";
-};
-
-&main_timer6 {
-       status = "reserved";
-};
-
-&main_timer7 {
-       status = "reserved";
-};
-
-&main_timer8 {
-       status = "reserved";
-};
-
-&main_timer9 {
-       status = "reserved";
-};
-
-&main_r5fss2 {
-       ti,cluster-mode = <0>;
-       status = "okay";
-};
-
-&main_r5fss0_core0 {
-       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
-       memory-region = <&main_r5fss0_core0_dma_memory_region>,
-                       <&main_r5fss0_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss0_core1 {
-       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
-       memory-region = <&main_r5fss0_core1_dma_memory_region>,
-                       <&main_r5fss0_core1_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1_core0 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
-       memory-region = <&main_r5fss1_core0_dma_memory_region>,
-                       <&main_r5fss1_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss1_core1 {
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
-       memory-region = <&main_r5fss1_core1_dma_memory_region>,
-                       <&main_r5fss1_core1_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss2_core0 {
-       mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core0>;
-       memory-region = <&main_r5fss2_core0_dma_memory_region>,
-                       <&main_r5fss2_core0_memory_region>;
-       status = "okay";
-};
-
-&main_r5fss2_core1 {
-       mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core1>;
-       memory-region = <&main_r5fss2_core1_dma_memory_region>,
-                       <&main_r5fss2_core1_memory_region>;
-       status = "okay";
-};
-
-&c71_0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
-       memory-region = <&c71_0_dma_memory_region>,
-                       <&c71_0_memory_region>;
-};
-
-&c71_1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
-       memory-region = <&c71_1_dma_memory_region>,
-                       <&c71_1_memory_region>;
-};
-
-&c71_2 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster5 &mbox_c71_2>;
-       memory-region = <&c71_2_dma_memory_region>,
-                       <&c71_2_memory_region>;
-};
-
 &c71_3 {
        status = "okay";
        mboxes = <&mailbox0_cluster5 &mbox_c71_3>;
@@ -1418,3 +1084,5 @@
        phys = <&serdes0_usb_link>;
        phy-names = "cdns3,usb3-phy";
 };
+
+#include "k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi"

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
index fdde1bd0e8316a92a9aa599baf89ca9e128cf8ad..419c1a70e028d017ff2bf8884537379634c5f3c7 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
@@ -46,126 +46,6 @@
                        reg = <0x00 0xa0100000 0x00 0xf00000>;
                        no-map;
                };
-
-               mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               mcu_r5fss0_core1_memory_region: memory@a1100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa1100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss0_core0_dma_memory_region: memory@a2000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core0_memory_region: memory@a2100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa2100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_dma_memory_region: memory@a3000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss0_core1_memory_region: memory@a3100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa3100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_dma_memory_region: memory@a4000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core0_memory_region: memory@a4100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa4100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_dma_memory_region: memory@a5000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa5000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss1_core1_memory_region: memory@a5100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa5100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss2_core0_dma_memory_region: memory@a6000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa6000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss2_core0_memory_region: memory@a6100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa6100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               main_r5fss2_core1_dma_memory_region: memory@a7000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa7000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               main_r5fss2_core1_memory_region: memory@a7100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa7100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               c71_0_dma_memory_region: memory@a8000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa8000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c71_0_memory_region: memory@a8100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa8100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               c71_1_dma_memory_region: memory@a9000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa9000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c71_1_memory_region: memory@a9100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xa9100000 0x00 0xf00000>;
-                       no-map;
-               };
-
-               c71_2_dma_memory_region: memory@aa000000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xaa000000 0x00 0x100000>;
-                       no-map;
-               };
-
-               c71_2_memory_region: memory@aa100000 {
-                       compatible = "shared-dma-pool";
-                       reg = <0x00 0xaa100000 0x00 0xf00000>;
-                       no-map;
-               };
        };
 
        evm_12v0: regulator-evm12v0 {
@@ -1069,228 +949,6 @@
        status = "okay";
 };
 
-&mailbox0_cluster0 {
-       status = "okay";
-       interrupts = <436>;
-
-       mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster1 {
-       status = "okay";
-       interrupts = <432>;
-
-       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster2 {
-       status = "okay";
-       interrupts = <428>;
-
-       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster3 {
-       status = "okay";
-       interrupts = <424>;
-
-       mbox_main_r5fss2_core0: mbox-main-r5fss2-core0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_main_r5fss2_core1: mbox-main-r5fss2-core1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster4 {
-       status = "okay";
-       interrupts = <420>;
-
-       mbox_c71_0: mbox-c71-0 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-
-       mbox_c71_1: mbox-c71-1 {
-               ti,mbox-rx = <2 0 0>;
-               ti,mbox-tx = <3 0 0>;
-       };
-};
-
-&mailbox0_cluster5 {
-       status = "okay";
-       interrupts = <416>;
-
-       mbox_c71_2: mbox-c71-2 {
-               ti,mbox-rx = <0 0 0>;
-               ti,mbox-tx = <1 0 0>;
-       };
-};
-
-&mcu_r5fss0 {
-       status = "okay";
-};
-
-&mcu_r5fss0_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
-       memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
-                       <&mcu_r5fss0_core0_memory_region>;
-};
-
-&mcu_r5fss0_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
-       memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
-                       <&mcu_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss0 {
-       ti,cluster-mode = <0>;
-       status = "okay";
-};
-
-&main_r5fss1 {
-       ti,cluster-mode = <0>;
-       status = "okay";
-};
-
-&main_r5fss2 {
-       ti,cluster-mode = <0>;
-       status = "okay";
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
-       status = "reserved";
-};
-
-&main_timer1 {
-       status = "reserved";
-};
-
-&main_timer2 {
-       status = "reserved";
-};
-
-&main_timer3 {
-       status = "reserved";
-};
-
-&main_timer4 {
-       status = "reserved";
-};
-
-&main_timer5 {
-       status = "reserved";
-};
-
-&main_timer6 {
-       status = "reserved";
-};
-
-&main_timer7 {
-       status = "reserved";
-};
-
-&main_timer8 {
-       status = "reserved";
-};
-
-&main_timer9 {
-       status = "reserved";
-};
-
-&main_r5fss0_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
-       memory-region = <&main_r5fss0_core0_dma_memory_region>,
-                       <&main_r5fss0_core0_memory_region>;
-};
-
-&main_r5fss0_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
-       memory-region = <&main_r5fss0_core1_dma_memory_region>,
-                       <&main_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss1_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
-       memory-region = <&main_r5fss1_core0_dma_memory_region>,
-                       <&main_r5fss1_core0_memory_region>;
-};
-
-&main_r5fss1_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
-       memory-region = <&main_r5fss1_core1_dma_memory_region>,
-                       <&main_r5fss1_core1_memory_region>;
-};
-
-&main_r5fss2_core0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core0>;
-       memory-region = <&main_r5fss2_core0_dma_memory_region>,
-                       <&main_r5fss2_core0_memory_region>;
-};
-
-&main_r5fss2_core1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core1>;
-       memory-region = <&main_r5fss2_core1_dma_memory_region>,
-                       <&main_r5fss2_core1_memory_region>;
-};
-
-&c71_0 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
-       memory-region = <&c71_0_dma_memory_region>,
-                       <&c71_0_memory_region>;
-};
-
-&c71_1 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
-       memory-region = <&c71_1_dma_memory_region>,
-                       <&c71_1_memory_region>;
-};
-
-&c71_2 {
-       status = "okay";
-       mboxes = <&mailbox0_cluster5 &mbox_c71_2>;
-       memory-region = <&c71_2_dma_memory_region>,
-                       <&c71_2_memory_region>;
-};
-
 &tscadc0 {
        pinctrl-0 = <&mcu_adc0_pins_default>;
        pinctrl-names = "default";
@@ -1619,3 +1277,5 @@
                0 0 0 0
        >;
 };
+
+#include "k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi"

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
new file mode 100644 (file)
index 0000000..4553972
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
@@ -0,0 +1,350 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on J784S4/J742S2 SoCs
+ *
+ * Copyright (C) 2022-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+       mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa1000000 0x00 0x100000>;
+               no-map;
+       };
+
+       mcu_r5fss0_core1_memory_region: memory@a1100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa1100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss0_core0_dma_memory_region: memory@a2000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa2000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss0_core0_memory_region: memory@a2100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa2100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss0_core1_dma_memory_region: memory@a3000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa3000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss0_core1_memory_region: memory@a3100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa3100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss1_core0_dma_memory_region: memory@a4000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa4000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss1_core0_memory_region: memory@a4100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa4100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss1_core1_dma_memory_region: memory@a5000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa5000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss1_core1_memory_region: memory@a5100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa5100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss2_core0_dma_memory_region: memory@a6000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa6000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss2_core0_memory_region: memory@a6100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa6100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       main_r5fss2_core1_dma_memory_region: memory@a7000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa7000000 0x00 0x100000>;
+               no-map;
+       };
+
+       main_r5fss2_core1_memory_region: memory@a7100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa7100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       c71_0_dma_memory_region: memory@a8000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa8000000 0x00 0x100000>;
+               no-map;
+       };
+
+       c71_0_memory_region: memory@a8100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa8100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       c71_1_dma_memory_region: memory@a9000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa9000000 0x00 0x100000>;
+               no-map;
+       };
+
+       c71_1_memory_region: memory@a9100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xa9100000 0x00 0xf00000>;
+               no-map;
+       };
+
+       c71_2_dma_memory_region: memory@aa000000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xaa000000 0x00 0x100000>;
+               no-map;
+       };
+
+       c71_2_memory_region: memory@aa100000 {
+               compatible = "shared-dma-pool";
+               reg = <0x00 0xaa100000 0x00 0xf00000>;
+               no-map;
+       };
+};
+
+&mailbox0_cluster0 {
+       status = "okay";
+       interrupts = <436>;
+
+       mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+
+       mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+               ti,mbox-rx = <2 0 0>;
+               ti,mbox-tx = <3 0 0>;
+       };
+};
+
+&mailbox0_cluster1 {
+       status = "okay";
+       interrupts = <432>;
+
+       mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+
+       mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+               ti,mbox-rx = <2 0 0>;
+               ti,mbox-tx = <3 0 0>;
+       };
+};
+
+&mailbox0_cluster2 {
+       status = "okay";
+       interrupts = <428>;
+
+       mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+
+       mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+               ti,mbox-rx = <2 0 0>;
+               ti,mbox-tx = <3 0 0>;
+       };
+};
+
+&mailbox0_cluster3 {
+       status = "okay";
+       interrupts = <424>;
+
+       mbox_main_r5fss2_core0: mbox-main-r5fss2-core0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+
+       mbox_main_r5fss2_core1: mbox-main-r5fss2-core1 {
+               ti,mbox-rx = <2 0 0>;
+               ti,mbox-tx = <3 0 0>;
+       };
+};
+
+&mailbox0_cluster4 {
+       status = "okay";
+       interrupts = <420>;
+
+       mbox_c71_0: mbox-c71-0 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+
+       mbox_c71_1: mbox-c71-1 {
+               ti,mbox-rx = <2 0 0>;
+               ti,mbox-tx = <3 0 0>;
+       };
+};
+
+&mailbox0_cluster5 {
+       status = "okay";
+       interrupts = <416>;
+
+       mbox_c71_2: mbox-c71-2 {
+               ti,mbox-rx = <0 0 0>;
+               ti,mbox-tx = <1 0 0>;
+       };
+};
+
+/* Timers are used by Remoteproc firmware */
+&main_timer0 {
+       status = "reserved";
+};
+
+&main_timer1 {
+       status = "reserved";
+};
+
+&main_timer2 {
+       status = "reserved";
+};
+
+&main_timer3 {
+       status = "reserved";
+};
+
+&main_timer4 {
+       status = "reserved";
+};
+
+&main_timer5 {
+       status = "reserved";
+};
+
+&main_timer6 {
+       status = "reserved";
+};
+
+&main_timer7 {
+       status = "reserved";
+};
+
+&main_timer8 {
+       status = "reserved";
+};
+
+&main_timer9 {
+       status = "reserved";
+};
+
+&mcu_r5fss0 {
+       status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+       memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+                       <&mcu_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0_core1 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
+       memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+                       <&mcu_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss0 {
+       ti,cluster-mode = <0>;
+       status = "okay";
+};
+
+&main_r5fss0_core0 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
+       memory-region = <&main_r5fss0_core0_dma_memory_region>,
+                       <&main_r5fss0_core0_memory_region>;
+};
+
+&main_r5fss0_core1 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
+       memory-region = <&main_r5fss0_core1_dma_memory_region>,
+                       <&main_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss1 {
+       ti,cluster-mode = <0>;
+       status = "okay";
+};
+
+&main_r5fss1_core0 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
+       memory-region = <&main_r5fss1_core0_dma_memory_region>,
+                       <&main_r5fss1_core0_memory_region>;
+};
+
+&main_r5fss1_core1 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
+       memory-region = <&main_r5fss1_core1_dma_memory_region>,
+                       <&main_r5fss1_core1_memory_region>;
+};
+
+&main_r5fss2 {
+       ti,cluster-mode = <0>;
+       status = "okay";
+};
+
+&main_r5fss2_core0 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core0>;
+       memory-region = <&main_r5fss2_core0_dma_memory_region>,
+                       <&main_r5fss2_core0_memory_region>;
+};
+
+&main_r5fss2_core1 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core1>;
+       memory-region = <&main_r5fss2_core1_dma_memory_region>,
+                       <&main_r5fss2_core1_memory_region>;
+};
+
+&c71_0 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
+       memory-region = <&c71_0_dma_memory_region>,
+                       <&c71_0_memory_region>;
+};
+
+&c71_1 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
+       memory-region = <&c71_1_dma_memory_region>,
+                       <&c71_1_memory_region>;
+};
+
+&c71_2 {
+       status = "okay";
+       mboxes = <&mailbox0_cluster5 &mbox_c71_2>;
+       memory-region = <&c71_2_dma_memory_region>,
+                       <&c71_2_memory_region>;
+};