net: stmmac: qcom-ethqos: simplify prg_rclk_dly programming

Rather than coding the entire register update twice with different
values, use a local variable to specify the value and have one
register update statement that uses this local variable. This results
in neater code.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Tested-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
Link: https://patch.msgid.link/E1w62no-0000000E3Cw-2EmH@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index 7690ae0bb00816cf779da668f572772d42a40975..580deec1dc30245b9b6db4f57ac06731591c5cc4 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -374,6 +374,7 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos)
 static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed)
 {
        struct device *dev = &ethqos->pdev->dev;
+       unsigned int prg_rclk_dly;
        int phase_shift;
        int loopback;
 
@@ -461,16 +462,16 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed)
                 */
                if (ethqos->has_emac_ge_3) {
                        /* 0.9 ns */
-                       rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY,
-                                     FIELD_PREP(SDCC_DDR_CONFIG_PRG_RCLK_DLY,
-                                                115), SDCC_HC_REG_DDR_CONFIG);
+                       prg_rclk_dly = 115;
                } else {
                        /* 1.8 ns */
-                       rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY,
-                                     FIELD_PREP(SDCC_DDR_CONFIG_PRG_RCLK_DLY,
-                                                57), SDCC_HC_REG_DDR_CONFIG);
+                       prg_rclk_dly = 57;
                }
 
+               rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY,
+                             FIELD_PREP(SDCC_DDR_CONFIG_PRG_RCLK_DLY,
+                                        prg_rclk_dly), SDCC_HC_REG_DDR_CONFIG);
+
                rgmii_setmask(ethqos, SDCC_DDR_CONFIG_PRG_DLY_EN,
                              SDCC_HC_REG_DDR_CONFIG);
        }