F: drivers/watchdog/ast_wdt.c
N: aspeed
+ARM AXIADO AX3005 SCM3005
+M: Siu Ming Tong <smtong@axiado.com>
+M: Karthikeyan Mitran <kmitran@axiado.com>
+M: Prasad Bolisetty <pbolisetty@axiado.com>
+S: Maintained
+F: arch/arm/dts/ax3005*
+F: arch/arm/mach-axiado/
+F: board/axiado/scm3005/
+F: configs/ax3005_scm3005_defconfig
+F: include/configs/ax3005-scm3005.h
+
ARM BROADCOM BCM283X / BCM27XX
M: Matthias Brugger <mbrugger@suse.com>
M: Peter Robinson <pbrobinson@gmail.com>
select OF_CONTROL
imply CMD_DM
+config ARCH_AXIADO
+ bool "Support Axiado SoCs"
+ select AXIADO_AX3005
+ help
+ Support for Axiado AX-series SoCs such as the AX3005.
+ These ARM64 SoCs are used in BMC and security applications.
+
config TARGET_DURIAN
bool "Support Phytium Durian Platform"
select ARM64
source "arch/arm/mach-at91/Kconfig"
+source "arch/arm/mach-axiado/Kconfig"
+
source "arch/arm/mach-bcm283x/Kconfig"
source "arch/arm/mach-bcmbca/Kconfig"
--- /dev/null
+if ARCH_AXIADO
+
+config SYS_ARCH
+ default "arm"
+
+config SYS_SOC
+ default "axiado"
+
+config AXIADO_AX3005
+ bool
+ select ARM64
+ select ARMV8_SWITCH_TO_EL1
+ select DM
+ select DM_SERIAL
+ select GICV3
+ select ZYNQ_SERIAL
+ select MMC_SDHCI_AXIADO
+ select PHY_AXIADO_EMMC
+
+source "arch/arm/mach-axiado/scm3005/Kconfig"
+
+endif
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
+#
+
+obj-$(CONFIG_AXIADO_AX3005) += scm3005/
--- /dev/null
+if AXIADO_AX3005
+
+config TARGET_SCM3005
+ bool "Support Axiado AX3005 SCM3005"
+ help
+ Support for the Axiado AX3005 SCM3005 board.
+ Based on the Axiado AX3005 quad-core ARMv8 Cortex-A53 SoC.
+
+source "board/axiado/scm3005/Kconfig"
+
+endif
--- /dev/null
+if TARGET_SCM3005
+
+config SYS_BOARD
+ string
+ default "scm3005"
+
+config SYS_VENDOR
+ string
+ default "axiado"
+
+config SYS_CONFIG_NAME
+ string
+ default "ax3005-scm3005"
+
+endif
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
+
+obj-y := scm3005.o
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
+ */
+
+#include <config.h>
+#include <dm.h>
+#include <init.h>
+#include <asm/global_data.h>
+#include <asm/armv8/mmu.h>
+#include <asm/io.h>
+#include <asm/spin_table.h>
+#include <asm/system.h>
+#include <fdt_support.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct mm_region axiado_ax3005_mem_map[] = {
+ { /* Peripherals including UART */
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 0x4A000000UL, /* 0 to 0x4A000000: peripherals */
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN },
+ { .virt = 0x80000000UL,
+ .phys = 0x80000000UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE },
+ {
+ 0,
+ }
+};
+
+struct mm_region *mem_map = axiado_ax3005_mem_map;
+
+/*
+ * Accept any FIT configuration name - the board loads a single FIT image
+ * and the first matching config is used.
+ */
+int board_fit_config_name_match(const char *name)
+{
+ return 0;
+}
+
+/*
+ * ft_board_setup - restore cpu-release-addr after relocation
+ *
+ * arch_fixup_fdt() / spin_table_update_dt() overwrites cpu-release-addr
+ * with U-Boot's relocated address. Restore the pre-relocation physical
+ * address so secondary cores spin on the correct location.
+ */
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+ int cpus_offset, offset;
+ const char *prop;
+ int ret;
+ u64 cpu_release_addr = (u64)&spin_table_cpu_release_addr - gd->reloc_off;
+
+ cpus_offset = fdt_path_offset(blob, "/cpus");
+ if (cpus_offset < 0)
+ return 0;
+
+ for (offset = fdt_first_subnode(blob, cpus_offset); offset >= 0;
+ offset = fdt_next_subnode(blob, offset)) {
+ prop = fdt_getprop(blob, offset, "device_type", NULL);
+ if (!prop || strcmp(prop, "cpu"))
+ continue;
+
+ prop = fdt_getprop(blob, offset, "enable-method", NULL);
+ if (!prop || strcmp(prop, "spin-table"))
+ continue;
+
+ ret = fdt_setprop_u64(blob, offset, "cpu-release-addr",
+ cpu_release_addr);
+ if (ret) {
+ printf("WARNING: Failed to restore cpu-release-addr\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+/*
+ * dram_init - DDR is initialized by firmware, just setting size
+ */
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
+ CFG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+/*
+ * the SOC uses single bank, non-interleaving
+ */
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = CFG_SYS_SDRAM_SIZE;
+ return 0;
+}
+
+/*
+ * timer_init - enable the AX3005 platform system timer
+ *
+ * CNTFRQ_EL0 is already set by arch/arm/cpu/armv8/start.S using
+ * CONFIG_COUNTER_FREQUENCY from the defconfig.
+ *
+ * SYS_TIMER_CTRL (0x48016000) is the AX3005 system timer control
+ * register — writing SYS_TIMER_ENABLE starts the counter that feeds
+ * the ARM generic timer.
+ */
+int timer_init(void)
+{
+ writel(SYS_TIMER_ENABLE, SYS_TIMER_CTRL);
+ return 0;
+}
+
+int board_init(void)
+{
+ return 0;
+}
+
+void reset_cpu(void)
+{
+ /* For later ARM_PSCI_FW or watchdog reset */
+}
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_AXIADO=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_TEXT_BASE=0x80000000
+CONFIG_SYS_MONITOR_BASE=0x80000000
+CONFIG_SYS_LOAD_ADDR=0x80100000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SYS_MALLOC_LEN=0x20000
+CONFIG_SYS_BOOTM_LEN=0x20000000
+CONFIG_ENV_SIZE=0x10000
+CONFIG_ENV_OFFSET=0x5000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_COUNTER_FREQUENCY=1000000000
+CONFIG_ARMV8_MULTIENTRY=y
+CONFIG_ARMV8_SET_SMPEN=y
+CONFIG_ARMV8_SPIN_TABLE=y
+CONFIG_SYS_CUSTOM_LDSCRIPT=y
+CONFIG_SYS_LDSCRIPT="arch/arm/cpu/armv8/u-boot.lds"
+CONFIG_BOOTDELAY=5
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_USE_PREBOOT=y
+CONFIG_DEFAULT_FDT_FILE="ax3005-scm3005.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="Axiado> "
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Press \"<Esc><Esc>\" to stop autobooting in %d seconds\n"
+CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyPS3,115200 maxcpus=4 nr_cpus=4 earlycon hugepages=16 root=/dev/ram rw phram.phram=ramrofs,0x80B00000,0x6400000"
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="bootm ${loadaddr}"
+CONFIG_SYS_VENDOR="axiado"
+CONFIG_SYS_BOARD="scm3005"
+CONFIG_SYS_CONFIG_NAME="ax3005-scm3005"
+# CONFIG_CMD_BOOTEFI is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_GO is not set
+CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_SEPARATE=y
+CONFIG_DEFAULT_DEVICE_TREE="ax3005-scm3005"
+CONFIG_MULTI_DTB_FIT=y
+# CONFIG_ENV_IS_IN_MMC is not set
+CONFIG_DM_MMC=y
+# CONFIG_SUPPORT_EMMC_BOOT is not set
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_TARGET_SCM3005=y
+CONFIG_CLK=y
+CONFIG_LZMA=y
+CONFIG_XZ=y
+CONFIG_ZYNQ_SERIAL=y
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
+# CONFIG_TOOLS_MKEFICAPSULE is not set
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
+ */
+
+#ifndef __AX3005_SCM3005_H
+#define __AX3005_SCM3005_H
+
+#include <linux/sizes.h>
+
+#define GICD_BASE 0x40400000
+#define GICR_BASE 0x40500000
+
+#define SYS_TIMER_CTRL 0x48016000
+#define SYS_TIMER_ENABLE 0x1
+#define SYS_TIMER_DISABLE 0x0
+
+/* DRAM: 2 GB at 0x80000000 */
+#define CFG_SYS_SDRAM_BASE 0x80000000
+#define CFG_SYS_SDRAM_SIZE SZ_2G
+#define CFG_SYS_INIT_SP_ADDR (CFG_SYS_SDRAM_BASE + SZ_1M)
+
+#define CFG_SYS_MAXARGS 64
+#define CFG_SYS_BARGSIZE CFG_SYS_CBSIZE
+
+#define CFG_SYS_BAUDRATE_TABLE \
+ { 4800, 9600, 19200, 38400, 57600, 115200 }
+
+#endif /* __AX3005_SCM3005_H */
projects / thirdparty / u-boot.git / commitdiff
