Simplify clk description by moving it to separate file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
--- /dev/null
+/*
+ * Clock specification for Xilinx ZynqMP
+ *
+ * (C) Copyright 2015, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+&amba {
+ clk100: clk100 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ };
+
+ clk125: clk125 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ };
+
+ clk200: clk200 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+
+ clk250: clk250 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <250000000>;
+ };
+
+ clk300: clk300 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <300000000>;
+ };
+
+ dp_aclk: clock0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ clock-accuracy = <100>;
+ };
+
+ dp_aud_clk: clock1 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ clock-accuracy = <100>;
+ };
+
+ dpdma_clk: dpdma_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <533000000>;
+ };
+
+ drm_clock: drm_clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <262750000>;
+ clock-accuracy = <0x64>;
+ };
+};
+
+&can0 {
+ clocks = <&clk100 &clk100>;
+};
+
+&can1 {
+ clocks = <&clk100 &clk100>;
+};
+
+&nand0 {
+ clocks = <&clk100 &clk100>;
+};
+
+&gem0 {
+ clocks = <&clk125>, <&clk125>, <&clk125>;
+};
+
+&gem1 {
+ clocks = <&clk125>, <&clk125>, <&clk125>;
+};
+
+&gem2 {
+ clocks = <&clk125>, <&clk125>, <&clk125>;
+};
+
+&gem3 {
+ clocks = <&clk125>, <&clk125>, <&clk125>;
+};
+
+&gpio {
+ clocks = <&clk100>;
+};
+
+&i2c0 {
+ clocks = <&clk100>;
+};
+
+&i2c1 {
+ clocks = <&clk100>;
+};
+
+&qspi {
+ clocks = <&clk300 &clk300>;
+};
+
+&sata {
+ clocks = <&clk250>;
+};
+
+&sdhci0 {
+ clocks = <&clk200 &clk200>;
+};
+
+&sdhci1 {
+ clocks = <&clk200 &clk200>;
+};
+
+&spi0 {
+ clocks = <&clk200 &clk200>;
+};
+
+&spi1 {
+ clocks = <&clk200 &clk200>;
+};
+
+&uart0 {
+ clocks = <&clk100 &clk100>;
+};
+
+&uart1 {
+ clocks = <&clk100 &clk100>;
+};
+
+&usb0 {
+ clocks = <&clk250>, <&clk250>;
+};
+
+&usb1 {
+ clocks = <&clk250>, <&clk250>;
+};
+
+&xilinx_drm {
+ clocks = <&drm_clock>;
+};
+
+&xlnx_dp {
+ clocks = <&dp_aclk>, <&dp_aud_clk>;
+};
+
+&xlnx_dpdma {
+ clocks = <&dpdma_clk>;
+};
/dts-v1/;
/include/ "zynqmp.dtsi"
+/include/ "zynqmp-clk.dtsi"
/ {
model = "ZynqMP zc1751-xm015-dc1 RevA";
compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
};
};
-&amba {
- /* clock for uart, can, nand, i2c */
- clk100: clk100 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <100000000>;
- };
-
- /* Gems */
- clk125: clk125 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <125000000>;
- };
-
- /* clock for sd/emmc */
- clk200: clk200 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
-
- /* clock for usb */
- clk250: clk250 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <250000000>;
- };
-
- /* clock for qspi */
- clk300: clk300 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <300000000>;
- };
-};
-
/* fpd_dma clk 667MHz, lpd_dma 500MHz */
&fpd_dma_chan1 {
status = "okay";
&gem3 {
status = "okay";
- clocks = <&clk125>, <&clk125>, <&clk125>;
local-mac-address = [00 0a 35 00 02 90];
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
&gpio {
status = "okay";
- clocks = <&clk100>;
};
&gpu {
&i2c1 {
status = "okay";
clock-frequency = <400000>;
- clocks = <&clk100>;
eeprom@54 {
compatible = "at,24c64"; /* 24AA64 */
reg = <0x54>;
&qspi {
status = "okay";
- clocks = <&clk300 &clk300>;
flash@0 {
compatible = "n25q512a11"; /* Micron MT25QU512ABB8ESF */
#address-cells = <1>;
&sata {
status = "okay";
- clocks = <&clk250>;
};
/* eMMC */
&sdhci0 {
status = "okay";
- clocks = <&clk200>, <&clk200>;
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
- clocks = <&clk200>, <&clk200>;
};
&uart0 {
status = "okay";
- clocks = <&clk100 &clk100>;
};
/* ULPI SMSC USB3320 */
status = "okay";
dr_mode = "peripheral";
maximum-speed = "high-speed";
- clocks = <&clk250>, <&clk250>;
};
/dts-v1/;
/include/ "zynqmp.dtsi"
+/include/ "zynqmp-clk.dtsi"
/ {
model = "ZynqMP zc1751-xm016-dc2 RevA";
compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
};
};
-&amba {
- /* clock for uart, can, nand, i2c */
- clk100: clk100 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <100000000>;
- };
-
- /* Gems */
- clk125: clk125 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <125000000>;
- };
-
- /* clock for sd/emmc */
- clk200: clk200 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
-
- /* clock for usb */
- clk250: clk250 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <250000000>;
- };
-
- /* clock for qspi */
- clk300: clk300 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <300000000>;
- };
-};
-
&can0 {
status = "okay";
- clocks = <&clk100 &clk100>;
};
&can1 {
status = "okay";
- clocks = <&clk100 &clk100>;
};
/* fpd_dma clk 667MHz, lpd_dma 500MHz */
&gem2 {
status = "okay";
- clocks = <&clk125>, <&clk125>, <&clk125>;
local-mac-address = [00 0a 35 00 02 90];
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
&gpio {
status = "okay";
- clocks = <&clk100>; /* FIXME - can't find in the table */
};
&i2c0 {
status = "okay";
clock-frequency = <400000>;
- clocks = <&clk100>;
tca6416_u26: gpio@20 {
compatible = "ti,tca6416";
status = "okay";
arasan,has-mdma;
num-cs = <2>;
- clocks = <&clk100 &clk100>;
partition@0 { /* for testing purpose */
label = "nand-fsbl-uboot";
&spi0 {
status = "okay";
num-cs = <1>;
- clocks = <&clk200 &clk200>;
spi0_flash0: spi0_flash0@0 {
compatible = "m25p80";
#address-cells = <1>;
&spi1 {
status = "okay";
num-cs = <1>;
- clocks = <&clk200 &clk200>;
spi1_flash0: spi1_flash0@0 {
compatible = "mtd_dataflash";
#address-cells = <1>;
status = "okay";
dr_mode = "peripheral";
maximum-speed = "high-speed";
- clocks = <&clk250>, <&clk250>;
};
&uart0 {
status = "okay";
- clocks = <&clk100 &clk100>;
};
&uart1 {
status = "okay";
- clocks = <&clk100 &clk100>;
};
/dts-v1/;
/include/ "zynqmp.dtsi"
+/include/ "zynqmp-clk.dtsi"
/ {
model = "ZynqMP ZCU102";
compatible = "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
};
};
-&amba {
- /* clock for uart, can, nand, i2c */
- clk100: clk100 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <100000000>;
- };
-
- /* Gems */
- clk125: clk125 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <125000000>;
- };
-
- /* clock for sd/emmc */
- clk200: clk200 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <200000000>;
- };
-
- /* clock for usb */
- clk250: clk250 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <250000000>;
- };
-
- /* clock for qspi */
- clk300: clk300 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <300000000>;
- };
-};
-
/* fpd_dma clk 667MHz, lpd_dma 500MHz */
&fpd_dma_chan1 {
status = "okay";
&gem3 {
status = "okay";
- clocks = <&clk125>, <&clk125>, <&clk125>;
local-mac-address = [00 0a 35 00 02 90];
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
&gpio {
status = "okay";
- clocks = <&clk100>;
};
&gpu {
&i2c0 {
status = "okay";
clock-frequency = <400000>;
- clocks = <&clk100>;
i2cswitch@75 { /* u60 */
compatible = "nxp,pca9544";
&i2c1 {
status = "okay";
clock-frequency = <400000>;
- clocks = <&clk100>;
/* FIXME PL i2c via PCA9306 - u45 */
/* FIXME MSP430 - u41 - not detected */
i2cswitch@74 { /* u34 */
&qspi {
status = "okay";
- clocks = <&clk300 &clk300>;
flash@0 {
compatible = "n25q512a11"; /* Micron MT25QU512ABB8ESF */
#address-cells = <1>;
&sata {
status = "okay";
- clocks = <&clk250>;
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
- clocks = <&clk200>, <&clk200>;
};
&uart0 {
status = "okay";
- clocks = <&clk100 &clk100>;
};
/* ULPI SMSC USB3320 */
status = "okay";
dr_mode = "peripheral";
maximum-speed = "high-speed";
- clocks = <&clk250>, <&clk250>;
};