drm/i915: BDW also has special-purpose DP DDI clocks

Don't let it fall in the HAS_PCH_SPLIT() case.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3ca6c7c77e05ff9db6458ca02afed240d7889796..568e532e3b420b99e5e08dbec38058c09a987d6f 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -756,7 +756,7 @@ intel_dp_set_clock(struct intel_encoder *encoder,
        if (IS_G4X(dev)) {
                divisor = gen4_dpll;
                count = ARRAY_SIZE(gen4_dpll);
-       } else if (IS_HASWELL(dev)) {
+       } else if (HAS_DDI(dev)) {
                /* Haswell has special-purpose DP DDI clocks. */
        } else if (HAS_PCH_SPLIT(dev)) {
                divisor = pch_dpll;