arm64: dts: renesas: r9a07g044: Add SYSC node

Add SYSC node to RZ/G2L (R9A07G044) SoC .dtsi.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609163717.3083-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 6a103a62eccbf704847c654986c859e3b055d8f6..734c8adeceba0707836ce414e1602c225ab70ff2 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -99,6 +99,18 @@
                        #power-domain-cells = <0>;
                };
 
+               sysc: system-controller@11020000 {
+                       compatible = "renesas,r9a07g044-sysc";
+                       reg = <0 0x11020000 0 0x10000>;
+                       interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "lpm_int", "ca55stbydone_int",
+                                         "cm33stbyr_int", "ca55_deny";
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@11900000 {
                        compatible = "arm,gic-v3";
                        #interrupt-cells = <3>;