drm/xe/pvc: Drop pre-prod workarounds

Production PVC hardware had a graphics stepping of C0.  Xe1 platforms
already aren't officially supported by the Xe driver, but pre-production
steppings are especially out of scope (and 'has_pre_prod_wa' is not set
in the device descriptor).  Drop the workarounds that aren't relevant to
production hardware.

v2:
 - Drop the stream->override_gucrc which is no longer set anywhere after
   the removal of Wa_1509372804.  (Bala)
 - Drop xe_guc_rc_set_mode / xe_guc_rc_unset_mode which are no longer
   used after the removal of Wa_1509372804.

Bspec: 44484
Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Link: https://patch.msgid.link/20260220-forupstream-wa_cleanup-v2-2-b12005a05af6@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index cbbb4d665b8fe66105727e83cfc59a13624d259e..54d2fc780127742e2e152da438c7d3e8332f3cbc 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -213,9 +213,6 @@ static u32 guc_ctl_wa_flags(struct xe_guc *guc)
            !xe_hw_engine_mask_per_class(gt, XE_ENGINE_CLASS_RENDER))
                flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST;
 
-       if (XE_GT_WA(gt, 1509372804))
-               flags |= GUC_WA_RENDER_RST_RC6_EXIT;
-
        if (XE_GT_WA(gt, 14018913170))
                flags |= GUC_WA_ENABLE_TSC_CHECK_ON_RC6;
 

diff --git a/drivers/gpu/drm/xe/xe_guc_rc.c b/drivers/gpu/drm/xe/xe_guc_rc.c
index 427a889b2a1e04b1d01bd7db8add20ce41f60ce5..99fa127b261ffb0fe7bdae5fcbc78258f67529a8 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc_rc.c
+++ b/drivers/gpu/drm/xe/xe_guc_rc.c
@@ -129,32 +129,3 @@ int xe_guc_rc_enable(struct xe_guc *guc)
 
        return guc_action_setup_gucrc(guc, GUCRC_FIRMWARE_CONTROL);
 }
-
-/**
- * xe_guc_rc_set_mode() - set new GUCRC mode
- * @guc: Xe GuC instance
- * @mode: new value of the mode.
- *
- * Function to set GuC RC mode to one of the enum values.
- *
- * Returns: 0 on success, negative error code on error
- */
-int xe_guc_rc_set_mode(struct xe_guc *guc, enum slpc_gucrc_mode mode)
-{
-       guard(xe_pm_runtime_noresume)(guc_to_xe(guc));
-       return xe_guc_pc_action_set_param(&guc->pc, SLPC_PARAM_PWRGATE_RC_MODE, mode);
-}
-
-/**
- * xe_guc_rc_unset_mode() - revert to default mode
- * @guc: Xe GuC instance
- *
- * Function to revert GuC RC mode to platform defaults.
- *
- * Returns: 0 on success, negative error code on error
- */
-int xe_guc_rc_unset_mode(struct xe_guc *guc)
-{
-       guard(xe_pm_runtime_noresume)(guc_to_xe(guc));
-       return xe_guc_pc_action_unset_param(&guc->pc, SLPC_PARAM_PWRGATE_RC_MODE);
-}

diff --git a/drivers/gpu/drm/xe/xe_guc_rc.h b/drivers/gpu/drm/xe/xe_guc_rc.h
index f1f949e7ecc0c6afab3eaeb616fe49d0437d710c..b083fc364dd430e5868a4e6da62b5777f5a6f1e1 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc_rc.h
+++ b/drivers/gpu/drm/xe/xe_guc_rc.h
@@ -12,7 +12,5 @@ enum slpc_gucrc_mode;
 int xe_guc_rc_init(struct xe_guc *guc);
 int xe_guc_rc_enable(struct xe_guc *guc);
 void xe_guc_rc_disable(struct xe_guc *guc);
-int xe_guc_rc_set_mode(struct xe_guc *guc, enum slpc_gucrc_mode mode);
-int xe_guc_rc_unset_mode(struct xe_guc *guc);
 
 #endif

diff --git a/drivers/gpu/drm/xe/xe_oa.c b/drivers/gpu/drm/xe/xe_oa.c
index a462d6983d8d6daf74beaf6fef5bfe2ab779179d..72fc4424017bf8fb7a42e3a3ae3f6adfe91cf21d 100644 (file)
--- a/drivers/gpu/drm/xe/xe_oa.c
+++ b/drivers/gpu/drm/xe/xe_oa.c
@@ -873,10 +873,6 @@ static void xe_oa_stream_destroy(struct xe_oa_stream *stream)
        xe_force_wake_put(gt_to_fw(gt), stream->fw_ref);
        xe_pm_runtime_put(stream->oa->xe);
 
-       /* Wa_1509372804:pvc: Unset the override of GUCRC mode to enable rc6 */
-       if (stream->override_gucrc)
-               xe_gt_WARN_ON(gt, xe_guc_rc_unset_mode(&gt->uc.guc));
-
        xe_oa_free_configs(stream);
        xe_file_put(stream->xef);
 }
@@ -1760,18 +1756,6 @@ static int xe_oa_stream_init(struct xe_oa_stream *stream,
                goto exit;
        }
 
-       /*
-        * GuC reset of engines causes OA to lose configuration
-        * state. Prevent this by overriding GUCRC mode.
-        */
-       if (XE_GT_WA(stream->gt, 1509372804)) {
-               ret = xe_guc_rc_set_mode(&gt->uc.guc, SLPC_GUCRC_MODE_GUCRC_NO_RC6);
-               if (ret)
-                       goto err_free_configs;
-
-               stream->override_gucrc = true;
-       }
-
        /* Take runtime pm ref and forcewake to disable RC6 */
        xe_pm_runtime_get(stream->oa->xe);
        stream->fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
@@ -1822,9 +1806,6 @@ err_free_oa_buf:
 err_fw_put:
        xe_force_wake_put(gt_to_fw(gt), stream->fw_ref);
        xe_pm_runtime_put(stream->oa->xe);
-       if (stream->override_gucrc)
-               xe_gt_WARN_ON(gt, xe_guc_rc_unset_mode(&gt->uc.guc));
-err_free_configs:
        xe_oa_free_configs(stream);
 exit:
        xe_file_put(stream->xef);

diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h
index 08cc8d7c221582662abff9397e27fbb8ccca468a..b03ffd513483449adc6b2937c0707e5bfc619a5b 100644 (file)
--- a/drivers/gpu/drm/xe/xe_oa_types.h
+++ b/drivers/gpu/drm/xe/xe_oa_types.h
@@ -239,9 +239,6 @@ struct xe_oa_stream {
        /** @poll_period_ns: hrtimer period for checking OA buffer for available data */
        u64 poll_period_ns;
 
-       /** @override_gucrc: GuC RC has been overridden for the OA stream */
-       bool override_gucrc;
-
        /** @oa_status: temporary storage for oa_status register value */
        u32 oa_status;
 

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index aa5755bcdc04a3ec2569ab9676a9dd95516f1711..4b2c77f51fd830fe2439708865fb0b966545bc71 100644 (file)
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -499,11 +499,6 @@ static const struct xe_rtp_entry_sr engine_was[] = {
                       ENGINE_CLASS(COMPUTE)),
          XE_RTP_ACTIONS(SET(RING_HWSTAM(RENDER_RING_BASE), ~0))
        },
-       { XE_RTP_NAME("14014999345"),
-         XE_RTP_RULES(PLATFORM(PVC), ENGINE_CLASS(COMPUTE),
-                      GRAPHICS_STEP(B0, C0)),
-         XE_RTP_ACTIONS(SET(CACHE_MODE_SS, DISABLE_ECC))
-       },
 
        /* Xe_LPG */
 

diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index cc988f2a18d33365dc09d32f4e85ced01b823877..c3222d9504889b5175fdfa73db0bf4e9910a277d 100644 (file)
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -8,7 +8,6 @@
 22012727685    SUBPLATFORM(DG2, G11)
 22016596838    PLATFORM(PVC)
 18020744125    PLATFORM(PVC)
-1509372804     PLATFORM(PVC), GRAPHICS_STEP(A0, C0)
 1409600907     GRAPHICS_VERSION_RANGE(1200, 1250)
 22014953428    SUBPLATFORM(DG2, G10)
                SUBPLATFORM(DG2, G12)
@@ -53,7 +52,6 @@
 18013179988    GRAPHICS_VERSION(1255)
                GRAPHICS_VERSION_RANGE(1270, 1274)
 1508761755     GRAPHICS_VERSION(1255)
-               GRAPHICS_VERSION(1260), GRAPHICS_STEP(A0, B0)
 16023105232    GRAPHICS_VERSION_RANGE(2001, 3001)
                MEDIA_VERSION_RANGE(1301, 3000)
                MEDIA_VERSION(3002)