riscv: asm: use .insn for making custom instructions

The assembler has .insn for building custom instructions
now, so change the .4byte to .insn. This ensures the output
is marked as an instruction and not as data which may
confuse both debuggers and anything else that relies on
this sort of marking.

Add an ASM_INSN_I() wrapper in asm.h to allow the selecting
of how this is output so older assemblers are still good.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Link: https://lore.kernel.org/r/20251024171640.65232-1-ben.dooks@codethink.co.uk
Signed-off-by: Paul Walmsley <pjw@kernel.org>

diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index ac28066bb564c194be754d5304a2b880e9aad3d5..e9e8ba83e632f945ec621cf331bc3a3adede77b9 100644 (file)
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -12,6 +12,12 @@
 #define __ASM_STR(x)   #x
 #endif
 
+#ifdef CONFIG_AS_HAS_INSN
+#define ASM_INSN_I(__x) ".insn " __x
+#else
+#define ASM_INSN_I(__x) ".4byte " __x
+#endif
+
 #if __riscv_xlen == 64
 #define __REG_SEL(a, b)        __ASM_STR(a)
 #elif __riscv_xlen == 32

diff --git a/arch/riscv/include/asm/insn-def.h b/arch/riscv/include/asm/insn-def.h
index c9cfcea52cbbcfd220a21bf04bae45119c2815f2..d29da6ccd3dd8462b94a44fbc42057b797c9c5f9 100644 (file)
--- a/arch/riscv/include/asm/insn-def.h
+++ b/arch/riscv/include/asm/insn-def.h
@@ -256,10 +256,10 @@
        INSN_S(OPCODE_OP_IMM, FUNC3(6), __RS2(3),               \
               SIMM12((offset) & 0xfe0), RS1(base))
 
-#define RISCV_PAUSE    ".4byte 0x100000f"
-#define ZAWRS_WRS_NTO  ".4byte 0x00d00073"
-#define ZAWRS_WRS_STO  ".4byte 0x01d00073"
-#define RISCV_NOP4     ".4byte 0x00000013"
+#define RISCV_PAUSE    ASM_INSN_I("0x100000f")
+#define ZAWRS_WRS_NTO  ASM_INSN_I("0x00d00073")
+#define ZAWRS_WRS_STO  ASM_INSN_I("0x01d00073")
+#define RISCV_NOP4     ASM_INSN_I("0x00000013")
 
 #define RISCV_INSN_NOP4        _AC(0x00000013, U)
 

diff --git a/arch/riscv/include/asm/vendor_extensions/mips.h b/arch/riscv/include/asm/vendor_extensions/mips.h
index ea8ca747d691df2e9ee7e5360f800fbdccfe3945..ffeb12dc17a3780ded27727b73acec09de8a5626 100644 (file)
--- a/arch/riscv/include/asm/vendor_extensions/mips.h
+++ b/arch/riscv/include/asm/vendor_extensions/mips.h
@@ -30,8 +30,8 @@ extern struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_mips;
  * allowing any subsequent instructions to fetch.
  */
 
-#define MIPS_PAUSE     ".4byte 0x00501013\n\t"
-#define MIPS_EHB       ".4byte 0x00301013\n\t"
-#define MIPS_IHB       ".4byte 0x00101013\n\t"
+#define MIPS_PAUSE     ASM_INSN_I("0x00501013\n\t")
+#define MIPS_EHB       ASM_INSN_I("0x00301013\n\t")
+#define MIPS_IHB       ASM_INSN_I("0x00101013\n\t")
 
 #endif // _ASM_RISCV_VENDOR_EXTENSIONS_MIPS_H