--- /dev/null
+From c35fad6f7e0d69b0e9e7e196bdbca3ed03ac24ea Mon Sep 17 00:00:00 2001
+From: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
+Date: Wed, 7 Aug 2024 14:21:48 +0530
+Subject: ASoC: amd: acp: add ZSC control register programming sequence
+
+From: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
+
+commit c35fad6f7e0d69b0e9e7e196bdbca3ed03ac24ea upstream.
+
+Add ZSC Control register programming sequence for ACP D0 and D3 state
+transitions for ACP7.0 onwards. This will allow ACP to enter low power
+state when ACP enters D3 state. When ACP enters D0 State, ZSC control
+should be disabled.
+
+Tested-by: Leo Li <sunpeng.li@amd.com>
+Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
+Link: https://patch.msgid.link/20240807085154.1987681-1-Vijendar.Mukunda@amd.com
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Cc: Mario Limonciello <mario.limonciello@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ sound/soc/amd/acp/acp-legacy-common.c | 5 +++++
+ sound/soc/amd/acp/amd.h | 2 ++
+ 2 files changed, 7 insertions(+)
+
+--- a/sound/soc/amd/acp/acp-legacy-common.c
++++ b/sound/soc/amd/acp/acp-legacy-common.c
+@@ -321,6 +321,8 @@ int acp_init(struct acp_chip_info *chip)
+ pr_err("ACP reset failed\n");
+ return ret;
+ }
++ if (chip->acp_rev >= ACP70_DEV)
++ writel(0, chip->base + ACP_ZSC_DSP_CTRL);
+ return 0;
+ }
+ EXPORT_SYMBOL_NS_GPL(acp_init, SND_SOC_ACP_COMMON);
+@@ -336,6 +338,9 @@ int acp_deinit(struct acp_chip_info *chi
+
+ if (chip->acp_rev != ACP70_DEV)
+ writel(0, chip->base + ACP_CONTROL);
++
++ if (chip->acp_rev >= ACP70_DEV)
++ writel(0x01, chip->base + ACP_ZSC_DSP_CTRL);
+ return 0;
+ }
+ EXPORT_SYMBOL_NS_GPL(acp_deinit, SND_SOC_ACP_COMMON);
+--- a/sound/soc/amd/acp/amd.h
++++ b/sound/soc/amd/acp/amd.h
+@@ -103,6 +103,8 @@
+ #define ACP70_PGFSM_CONTROL ACP6X_PGFSM_CONTROL
+ #define ACP70_PGFSM_STATUS ACP6X_PGFSM_STATUS
+
++#define ACP_ZSC_DSP_CTRL 0x0001014
++#define ACP_ZSC_STS 0x0001018
+ #define ACP_SOFT_RST_DONE_MASK 0x00010001
+
+ #define ACP_PGFSM_CNTL_POWER_ON_MASK 0xffffffff
--- /dev/null
+From 7ffaa200251871980af12e57649ad57c70bf0f43 Mon Sep 17 00:00:00 2001
+From: Kiran K <kiran.k@intel.com>
+Date: Thu, 12 Sep 2024 16:21:00 +0530
+Subject: Bluetooth: btintel_pcie: Allocate memory for driver private data
+
+From: Kiran K <kiran.k@intel.com>
+
+commit 7ffaa200251871980af12e57649ad57c70bf0f43 upstream.
+
+Fix driver not allocating memory for struct btintel_data which is used
+to store internal data.
+
+Fixes: 6e65a09f9275 ("Bluetooth: btintel_pcie: Add *setup* function to download firmware")
+Signed-off-by: Kiran K <kiran.k@intel.com>
+Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
+Cc: Thomas Leroy <thomas.leroy@suse.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/bluetooth/btintel_pcie.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/bluetooth/btintel_pcie.c
++++ b/drivers/bluetooth/btintel_pcie.c
+@@ -1208,7 +1208,7 @@ static int btintel_pcie_setup_hdev(struc
+ int err;
+ struct hci_dev *hdev;
+
+- hdev = hci_alloc_dev();
++ hdev = hci_alloc_dev_priv(sizeof(struct btintel_data));
+ if (!hdev)
+ return -ENOMEM;
+
--- /dev/null
+From 83bdfcbdbe5d901c5fa432decf12e1725a840a56 Mon Sep 17 00:00:00 2001
+From: Keith Busch <kbusch@kernel.org>
+Date: Wed, 11 Sep 2024 10:39:59 -0700
+Subject: nvme-pci: qdepth 1 quirk
+
+From: Keith Busch <kbusch@kernel.org>
+
+commit 83bdfcbdbe5d901c5fa432decf12e1725a840a56 upstream.
+
+Another device has been reported to be unreliable if we have more than
+one outstanding command. In this new case, data corruption may occur.
+Since we have two devices now needing this quirky behavior, make a
+generic quirk flag.
+
+The same Apple quirk is clearly not "temporary", so update the comment
+while moving it.
+
+Link: https://lore.kernel.org/linux-nvme/191d810a4e3.fcc6066c765804.973611676137075390@collabora.com/
+Reported-by: Robert Beckett <bob.beckett@collabora.com>
+Reviewed-by: Christoph Hellwig hch@lst.de>
+Signed-off-by: Keith Busch <kbusch@kernel.org>
+Cc: "Gagniuc, Alexandru" <alexandru.gagniuc@hp.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvme/host/nvme.h | 5 +++++
+ drivers/nvme/host/pci.c | 18 +++++++++---------
+ 2 files changed, 14 insertions(+), 9 deletions(-)
+
+--- a/drivers/nvme/host/nvme.h
++++ b/drivers/nvme/host/nvme.h
+@@ -91,6 +91,11 @@ enum nvme_quirks {
+ NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
+
+ /*
++ * Problems seen with concurrent commands
++ */
++ NVME_QUIRK_QDEPTH_ONE = (1 << 6),
++
++ /*
+ * Set MEDIUM priority on SQ creation
+ */
+ NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7),
+--- a/drivers/nvme/host/pci.c
++++ b/drivers/nvme/host/pci.c
+@@ -2563,15 +2563,8 @@ static int nvme_pci_enable(struct nvme_d
+ else
+ dev->io_sqes = NVME_NVM_IOSQES;
+
+- /*
+- * Temporary fix for the Apple controller found in the MacBook8,1 and
+- * some MacBook7,1 to avoid controller resets and data loss.
+- */
+- if (pdev->vendor == PCI_VENDOR_ID_APPLE && pdev->device == 0x2001) {
++ if (dev->ctrl.quirks & NVME_QUIRK_QDEPTH_ONE) {
+ dev->q_depth = 2;
+- dev_warn(dev->ctrl.device, "detected Apple NVMe controller, "
+- "set queue depth=%u to work around controller resets\n",
+- dev->q_depth);
+ } else if (pdev->vendor == PCI_VENDOR_ID_SAMSUNG &&
+ (pdev->device == 0xa821 || pdev->device == 0xa822) &&
+ NVME_CAP_MQES(dev->ctrl.cap) == 0) {
+@@ -3442,6 +3435,8 @@ static const struct pci_device_id nvme_i
+ NVME_QUIRK_BOGUS_NID, },
+ { PCI_VDEVICE(REDHAT, 0x0010), /* Qemu emulated controller */
+ .driver_data = NVME_QUIRK_BOGUS_NID, },
++ { PCI_DEVICE(0x1217, 0x8760), /* O2 Micro 64GB Steam Deck */
++ .driver_data = NVME_QUIRK_QDEPTH_ONE },
+ { PCI_DEVICE(0x126f, 0x2262), /* Silicon Motion generic */
+ .driver_data = NVME_QUIRK_NO_DEEPEST_PS |
+ NVME_QUIRK_BOGUS_NID, },
+@@ -3576,7 +3571,12 @@ static const struct pci_device_id nvme_i
+ { PCI_DEVICE(PCI_VENDOR_ID_AMAZON, 0xcd02),
+ .driver_data = NVME_QUIRK_DMA_ADDRESS_BITS_48, },
+ { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001),
+- .driver_data = NVME_QUIRK_SINGLE_VECTOR },
++ /*
++ * Fix for the Apple controller found in the MacBook8,1 and
++ * some MacBook7,1 to avoid controller resets and data loss.
++ */
++ .driver_data = NVME_QUIRK_SINGLE_VECTOR |
++ NVME_QUIRK_QDEPTH_ONE },
+ { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2003) },
+ { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2005),
+ .driver_data = NVME_QUIRK_SINGLE_VECTOR |