vg_cachesim.c:536 (vgPlain_cachesim_instrument):
Assertion `instr_size >= 1 && instr_size <= 16' failed.
so disable them when cache profiling.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@238
{ Int n_pops;
Addr eipS, eipE;
UChar ch;
- if (sz != 4) goto normal_pop_case;
+ if (sz != 4) goto normal_pop_case;
+ if (VG_(clo_cachesim)) goto normal_pop_case;
/* eip points at first pop insn + 1. Make eipS and eipE
bracket the sequence. */
eipE = eipS = eip - 1;
{ Int n_pushes;
Addr eipS, eipE;
UChar ch;
- if (sz != 4) goto normal_push_case;
+ if (sz != 4) goto normal_push_case;
+ if (VG_(clo_cachesim)) goto normal_push_case;
/* eip points at first push insn + 1. Make eipS and eipE
bracket the sequence. */
eipE = eipS = eip - 1;
{ Int n_pops;
Addr eipS, eipE;
UChar ch;
- if (sz != 4) goto normal_pop_case;
+ if (sz != 4) goto normal_pop_case;
+ if (VG_(clo_cachesim)) goto normal_pop_case;
/* eip points at first pop insn + 1. Make eipS and eipE
bracket the sequence. */
eipE = eipS = eip - 1;
{ Int n_pushes;
Addr eipS, eipE;
UChar ch;
- if (sz != 4) goto normal_push_case;
+ if (sz != 4) goto normal_push_case;
+ if (VG_(clo_cachesim)) goto normal_push_case;
/* eip points at first push insn + 1. Make eipS and eipE
bracket the sequence. */
eipE = eipS = eip - 1;