struct rteth_tx *tx_data;
};
+static inline void rteth_reenable_irq(struct rteth_ctrl *ctrl, int ring)
+{
+ u32 shift = ctrl->r->rx_rings % 32;
+ u32 reg = ctrl->r->rx_rings / 32;
+ unsigned long flags;
+
+ spin_lock_irqsave(&ctrl->lock, flags);
+ sw_w32_mask(0, BIT(ring + shift), ctrl->r->dma_if_intr_msk + reg * 4);
+ spin_unlock_irqrestore(&ctrl->lock, flags);
+}
+
static inline void rteth_confirm_and_disable_irqs(struct rteth_ctrl *ctrl,
unsigned long *rings, bool *l2)
{
{
struct rtl838x_rx_q *rx_q = container_of(napi, struct rtl838x_rx_q, napi);
struct rteth_ctrl *ctrl = rx_q->ctrl;
- unsigned long flags;
int ring = rx_q->id;
int work_done = 0;
work_done += work;
}
- if (work_done < budget && napi_complete_done(napi, work_done)) {
- /* Re-enable rx interrupts */
- spin_lock_irqsave(&ctrl->lock, flags);
- if (ctrl->r->family_id == RTL9300_FAMILY_ID || ctrl->r->family_id == RTL9310_FAMILY_ID)
- sw_w32_mask(0, RTL93XX_DMA_IF_INTR_RX_MASK(ring), ctrl->r->dma_if_intr_rx_done_msk);
- else
- sw_w32_mask(0, RTL83XX_DMA_IF_INTR_RX_MASK(ring), ctrl->r->dma_if_intr_msk);
- spin_unlock_irqrestore(&ctrl->lock, flags);
- }
+ if (work_done < budget && napi_complete_done(napi, work_done))
+ rteth_reenable_irq(ctrl, ring);
return work_done;
}
#define RTL931X_L2_NTFY_IF_INTR_STS (0x09E8)
#define RTL839X_DMA_IF_INTR_NOTIFY_MASK GENMASK(22, 20)
-#define RTL83XX_DMA_IF_INTR_RX_DONE_MASK GENMASK(15, 8)
-#define RTL83XX_DMA_IF_INTR_RX_RUN_OUT_MASK GENMASK(7, 0)
-#define RTL83XX_DMA_IF_INTR_RX_MASK(ring) (BIT(ring + 8))
-#define RTL93XX_DMA_IF_INTR_RX_MASK(ring) (BIT(ring))
/* MAC address settings */
#define RTL838X_MAC (0xa9ec)