]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: resume MES scheduling after user queue hang detection and recovery
authorJesse.Zhang <Jesse.Zhang@amd.com>
Fri, 7 Nov 2025 11:19:08 +0000 (19:19 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 12 Nov 2025 02:54:17 +0000 (21:54 -0500)
This patch ensures the Micro-Engine Scheduler (MES) is properly resumed
after detecting and recovering from a user queue hang condition.

Key changes:
1. Track when a hung user queue is detected using found_hung_queue flag
2. Call amdgpu_mes_resume() to restart MES scheduling after completing
   the hang recovery process
3. This complements the existing recovery steps (fence force completion
   and device wedging) by ensuring the scheduler can process new work

Without this resume call, the MES scheduler may remain in a paused state
even after the hung queue has been handled, preventing newly submitted
work from being processed and leading to system stalls.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/mes_userqueue.c

index b1ee9473d6280611222d03ebb692d5f40c61617b..64cae89357b653d5c3256ff4a93a665650ba8bf4 100644 (file)
@@ -208,6 +208,7 @@ static int mes_userq_detect_and_reset(struct amdgpu_device *adev,
        unsigned int hung_db_num = 0;
        unsigned long queue_id;
        u32 db_array[8];
+       bool found_hung_queue = false;
        int r, i;
 
        if (db_array_size > 8) {
@@ -232,6 +233,7 @@ static int mes_userq_detect_and_reset(struct amdgpu_device *adev,
                                for (i = 0; i < hung_db_num; i++) {
                                        if (queue->doorbell_index == db_array[i]) {
                                                queue->state = AMDGPU_USERQ_STATE_HUNG;
+                                               found_hung_queue = true;
                                                atomic_inc(&adev->gpu_reset_counter);
                                                amdgpu_userq_fence_driver_force_completion(queue);
                                                drm_dev_wedged_event(adev_to_drm(adev), DRM_WEDGE_RECOVERY_NONE, NULL);
@@ -241,6 +243,11 @@ static int mes_userq_detect_and_reset(struct amdgpu_device *adev,
                }
        }
 
+       if (found_hung_queue) {
+               /* Resume scheduling after hang recovery */
+               r = amdgpu_mes_resume(adev);
+       }
+
        return r;
 }