#define HDR_30 0x00000120
#define HDR_34 0x00000000
#define HDR_38 0x00000000
-#define HDR_3C CONFIG_SYS_FLASH_BASE
+#define HDR_3C CONFIG_PELE_XIP_START
#define HDR_40 0x00000000
#define HDR_44 0x00000001
#define HDR_CSUM (~(HDR_20+HDR_24+HDR_28+HDR_2C+HDR_30+HDR_34+HDR_38+HDR_3C+HDR_40+HDR_44))
//#define CONFIG_PELE_INIT_GEM //this is to initialize GEM at uboot start
#define CONFIG_PELE_IP_ENV //this is to set ipaddr, ethaddr and serverip env variables.
-#define CONFIG_PELE_XILINX_FLASH_HEADER
+
#ifndef CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_NAND_BASE XPSS_NAND_BASEADDR
#define CONFIG_MTD_DEVICE
+/* Place a Xilinx Boot ROM header in u-boot image? */
+#define CONFIG_PELE_XILINX_FLASH_HEADER
+
+#ifdef CONFIG_PELE_XILINX_FLASH_HEADER
+/* Address Xilinx boot rom should use to launch u-boot */
+#ifdef CONFIG_PELE_XIL_LQSPI
+#define CONFIG_PELE_XIP_START XPSS_QSPI_LIN_BASEADDR
+#else
+/* NOR */
+#define CONFIG_PELE_XIP_START CONFIG_SYS_FLASH_BASE
+#endif
+#endif
+
#endif /* __CONFIG_H */