]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/msm/dpu: Drop maxwidth from dpu_lm_sub_blks struct
authorJessica Zhang <jessica.zhang@oss.qualcomm.com>
Wed, 14 May 2025 23:52:29 +0000 (16:52 -0700)
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Wed, 3 Sep 2025 09:43:34 +0000 (12:43 +0300)
Drop the unused maxwidth field from the dpu_lm_sub_blks struct

Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/653759/
Link: https://lore.kernel.org/r/20250514-max-mixer-width-v1-1-c8ba0d9bb858@oss.qualcomm.com
[DB: also handled SM8750 block]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

index e824cd64fd3fdf2ab0db92794a0aaa57c109decb..6641455c4ec6a2d082644f1488ea5f5605ccc208 100644 (file)
@@ -338,7 +338,6 @@ static const struct dpu_sspp_sub_blks dpu_dma_sblk = _DMA_SBLK();
  *************************************************************/
 
 static const struct dpu_lm_sub_blks msm8998_lm_sblk = {
-       .maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .maxblendstages = 7, /* excluding base layer */
        .blendstage_base = { /* offsets relative to mixer base */
                0x20, 0x50, 0x80, 0xb0, 0x230,
@@ -347,7 +346,6 @@ static const struct dpu_lm_sub_blks msm8998_lm_sblk = {
 };
 
 static const struct dpu_lm_sub_blks sdm845_lm_sblk = {
-       .maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .maxblendstages = 11, /* excluding base layer */
        .blendstage_base = { /* offsets relative to mixer base */
                0x20, 0x38, 0x50, 0x68, 0x80, 0x98,
@@ -356,7 +354,6 @@ static const struct dpu_lm_sub_blks sdm845_lm_sblk = {
 };
 
 static const struct dpu_lm_sub_blks sc7180_lm_sblk = {
-       .maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .maxblendstages = 7, /* excluding base layer */
        .blendstage_base = { /* offsets relative to mixer base */
                0x20, 0x38, 0x50, 0x68, 0x80, 0x98, 0xb0
@@ -364,7 +361,6 @@ static const struct dpu_lm_sub_blks sc7180_lm_sblk = {
 };
 
 static const struct dpu_lm_sub_blks sm8750_lm_sblk = {
-       .maxwidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .maxblendstages = 11, /* excluding base layer */
        .blendstage_base = { /* offsets relative to mixer base */
                /* 0x40 + n*0x30 */
@@ -374,7 +370,6 @@ static const struct dpu_lm_sub_blks sm8750_lm_sblk = {
 };
 
 static const struct dpu_lm_sub_blks qcm2290_lm_sblk = {
-       .maxwidth = DEFAULT_DPU_LINE_WIDTH,
        .maxblendstages = 4, /* excluding base layer */
        .blendstage_base = { /* offsets relative to mixer base */
                0x20, 0x38, 0x50, 0x68
index a78bb2c334e30bc86554bde45355808b790c6235..f0768f54e9b3d5a3f5a7bec4b66127f2e2284cfd 100644 (file)
@@ -307,7 +307,6 @@ struct dpu_sspp_sub_blks {
  * @blendstage_base:        Blend-stage register base offset
  */
 struct dpu_lm_sub_blks {
-       u32 maxwidth;
        u32 maxblendstages;
        u32 blendstage_base[MAX_BLOCKS];
 };