net: macb: runtime detect MACB_CAPS_USRIO_DISABLED

DCFG1 (design config 1 register) carries a bit indicating whether User
I/O feature has been enabled or not. The MACB/GEM driver has a cap flag
indicating that HW has the feature disabled (default is enabled). Add
the missing connection between DCFG1 bit and MACB_CAPS_USRIO_DISABLED.

Indirect impact: avoid useless writel() on USERIO register; this is not
an important fix because USERIO is anyway read-only when feature is
disabled.

If for some reason a compatible sets USRIO_DISABLED but DCFG1 indicates
it is enabled, we still keep the disabled capability flag. This ensures
we don't break "cdns,np4-macb" that sets the flag from compatible match
data.

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260325-compactly-glue-f426a2e68904@spud
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 8e5305f9a7545396d014a93a535cb3e4593db0b9..16527dbab875dc2f65c74987c54b5b323a0c252c 100644 (file)
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -524,6 +524,8 @@
 #define GEM_IRQCOR_SIZE                                1
 #define GEM_DBWDEF_OFFSET                      25
 #define GEM_DBWDEF_SIZE                                3
+#define GEM_USERIO_OFFSET                      9
+#define GEM_USERIO_SIZE                                1
 #define GEM_NO_PCS_OFFSET                      0
 #define GEM_NO_PCS_SIZE                                1
 

diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index 11074938c6bb721e64f8715ab8065e5b26ba3f6b..281ab0d7b7c097f4a227aca7a2266d94ec48f578 100644 (file)
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4588,6 +4588,8 @@ static void macb_configure_caps(struct macb *bp,
                        bp->caps |= MACB_CAPS_ISR_CLEAR_ON_WRITE;
                if (GEM_BFEXT(NO_PCS, dcfg) == 0)
                        bp->caps |= MACB_CAPS_PCS;
+               if (!(dcfg & GEM_BIT(USERIO)))
+                       bp->caps |= MACB_CAPS_USRIO_DISABLED;
                dcfg = gem_readl(bp, DCFG12);
                if (GEM_BFEXT(HIGH_SPEED, dcfg) == 1)
                        bp->caps |= MACB_CAPS_HIGH_SPEED;