{
MatchInfo mi;
DECLARE_PATTERN(p_8Uto64);
- DECLARE_PATTERN(p_16Uto64);
DECLARE_PATTERN(p_1Uto8_64to1);
-//.. DECLARE_PATTERN(p_32to1_then_1Uto8);
IRType ty = typeOfIRExpr(env->type_env,e);
vassert(ty == Ity_I32 || Ity_I16 || Ity_I8);
static AMD64CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e )
{
MatchInfo mi;
- DECLARE_PATTERN(p_32to1_64to32);
//.. DECLARE_PATTERN(p_1Uto32_then_32to1);
//.. DECLARE_PATTERN(p_1Sto32_then_32to1);
return IRExpr_Binop(op, a1, a2);
}
-static IRExpr* mkU64 ( ULong i )
-{
- return IRExpr_Const(IRConst_U64(i));
-}
-
-static IRExpr* mkU32 ( UInt i )
-{
- return IRExpr_Const(IRConst_U32(i));
-}
-
static IRExpr* bind ( Int binder )
{
return IRExpr_Binder(binder);
/*--- ISEL: Misc helpers ---*/
/*---------------------------------------------------------*/
-/* Is this a 32-bit zero expression? */
-
-static Bool isZero32 ( IRExpr* e )
-{
- return toBool( e->tag == Iex_Const
- && e->Iex.Const.con->tag == Ico_U32
- && e->Iex.Const.con->Ico.U32 == 0 );
-}
-
/* Make a int reg-reg move. */
static X86Instr* mk_iMOVsd_RR ( HReg src, HReg dst )