net: ethernet: ti: am65-cpsw-qos: fix IET verify/response timeout

The CPSW module uses the MAC_VERIFY_CNT bit field in the
CPSW_PN_IET_VERIFY_REG_k register to set the verify/response timeout
count. This register specifies the number of clock cycles to wait before
resending a verify packet if the verification fails.

The verify/response timeout count, as being set by the function
am65_cpsw_iet_set_verify_timeout_count() is hardcoded for 125MHz
clock frequency, which varies based on PHY mode and link speed.

The respective clock frequencies are as follows:
- RGMII mode:
  * 1000 Mbps: 125 MHz
  * 100 Mbps: 25 MHz
  * 10 Mbps: 2.5 MHz
- QSGMII/SGMII mode: 125 MHz (all speeds)

Fix this by adding logic to calculate the correct timeout counts
based on the actual PHY interface mode and link speed.

Fixes: 49a2eb9068246 ("net: ethernet: ti: am65-cpsw-qos: Add Frame Preemption MAC Merge support")
Signed-off-by: Aksh Garg <a-garg7@ti.com>
Link: https://patch.msgid.link/20251106092305.1437347-2-a-garg7@ti.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/ti/am65-cpsw-qos.c b/drivers/net/ethernet/ti/am65-cpsw-qos.c
index fa96db7c1a1305525c8ebde1a2eaa55cc188d05a..ad06942ce461ae2429f25a4e005e447550dc247a 100644 (file)
--- a/drivers/net/ethernet/ti/am65-cpsw-qos.c
+++ b/drivers/net/ethernet/ti/am65-cpsw-qos.c
@@ -276,9 +276,31 @@ static int am65_cpsw_iet_set_verify_timeout_count(struct am65_cpsw_port *port)
        /* The number of wireside clocks contained in the verify
         * timeout counter. The default is 0x1312d0
         * (10ms at 125Mhz in 1G mode).
+        * The frequency of the clock depends on the link speed
+        * and the PHY interface.
         */
-       val = 125 * HZ_PER_MHZ; /* assuming 125MHz wireside clock */
+       switch (port->slave.phy_if) {
+       case PHY_INTERFACE_MODE_RGMII:
+       case PHY_INTERFACE_MODE_RGMII_ID:
+       case PHY_INTERFACE_MODE_RGMII_RXID:
+       case PHY_INTERFACE_MODE_RGMII_TXID:
+               if (port->qos.link_speed == SPEED_1000)
+                       val = 125 * HZ_PER_MHZ; /* 125 MHz at 1000Mbps*/
+               else if (port->qos.link_speed == SPEED_100)
+                       val = 25 * HZ_PER_MHZ;  /* 25 MHz at 100Mbps*/
+               else
+                       val = (25 * HZ_PER_MHZ) / 10;   /* 2.5 MHz at 10Mbps*/
+               break;
+
+       case PHY_INTERFACE_MODE_QSGMII:
+       case PHY_INTERFACE_MODE_SGMII:
+               val = 125 * HZ_PER_MHZ; /* 125 MHz */
+               break;
 
+       default:
+               netdev_err(port->ndev, "selected mode does not supported IET\n");
+               return -EOPNOTSUPP;
+       }
        val /= MILLIHZ_PER_HZ;          /* count per ms timeout */
        val *= verify_time_ms;          /* count for timeout ms */