arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists

[ Upstream commit a5951389e58d2e816eed3dbec5877de9327fd881 ]

When comparing to the ARM list [1], it appears that several ARM cores
were missing from the lists in spectre_bhb_loop_affected(). Add them.

NOTE: for some of these cores it may not matter since other ways of
clearing the BHB may be used (like the CLRBHB instruction or ECBHB),
but it still seems good to have all the info from ARM's whitepaper
included.

[1] https://developer.arm.com/Arm%20Security%20Center/Spectre-BHB

Fixes: 558c303c9734 ("arm64: Mitigate spectre style branch history side channels")
Cc: stable@vger.kernel.org
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: James Morse <james.morse@arm.com>
Link: https://lore.kernel.org/r/20250107120555.v4.5.I4a9a527e03f663040721c5401c41de587d015c82@changeid
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Pu Lehui <pulehui@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pack.c
index 73cca41694daea7a3ff004e9b74d308d88c75c43..68a75afba0c42cc2d9b2b48eda5fc8b3464e4f74 100644 (file)
--- a/arch/arm64/kernel/proton-pack.c
+++ b/arch/arm64/kernel/proton-pack.c
@@ -884,6 +884,14 @@ static u8 spectre_bhb_loop_affected(void)
 {
        u8 k = 0;
 
+       static const struct midr_range spectre_bhb_k132_list[] = {
+               MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),
+               MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
+       };
+       static const struct midr_range spectre_bhb_k38_list[] = {
+               MIDR_ALL_VERSIONS(MIDR_CORTEX_A715),
+               MIDR_ALL_VERSIONS(MIDR_CORTEX_A720),
+       };
        static const struct midr_range spectre_bhb_k32_list[] = {
                MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),
                MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE),
@@ -897,6 +905,7 @@ static u8 spectre_bhb_loop_affected(void)
        };
        static const struct midr_range spectre_bhb_k24_list[] = {
                MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),
+               MIDR_ALL_VERSIONS(MIDR_CORTEX_A76AE),
                MIDR_ALL_VERSIONS(MIDR_CORTEX_A77),
                MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
                MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_GOLD),
@@ -912,7 +921,11 @@ static u8 spectre_bhb_loop_affected(void)
                {},
        };
 
-       if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k32_list))
+       if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k132_list))
+               k = 132;
+       else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k38_list))
+               k = 38;
+       else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k32_list))
                k = 32;
        else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k24_list))
                k = 24;