ARM64: zynqmp: Added OOB timing settings in zynqmp-zcu102.dts

This patch adds the sata port phy OOB timing values in the sata
device-tree node.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/zynqmp-zcu102.dts b/arch/arm/dts/zynqmp-zcu102.dts
index 3dff0297648ec9b88f75e0f50b2bc753974755af..567adf868181df55fc01ecf52aa02559f2c76998 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu102.dts
+++ b/arch/arm/dts/zynqmp-zcu102.dts
@@ -566,6 +566,15 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
 
 &sata {
        status = "okay";
+       /* SATA OOB timing settings */
+       ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
+       ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
+       ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
+       ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+       ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
+       ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
+       ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
+       ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
 };
 
 /* SD1 with level shifter */