]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
powerpc/mm: Switch obsolete dssall to .long
authorAlexey Kardashevskiy <aik@ozlabs.ru>
Tue, 21 Dec 2021 05:59:03 +0000 (16:59 +1100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 25 Jun 2022 09:49:17 +0000 (11:49 +0200)
commit d51f86cfd8e378d4907958db77da3074f6dce3ba upstream.

The dssall ("Data Stream Stop All") instruction is obsolete altogether
with other Data Cache Instructions since ISA 2.03 (year 2006).

LLVM IAS does not support it but PPC970 seems to be using it.
This switches dssall to .long as there is no much point in fixing LLVM.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211221055904.555763-6-aik@ozlabs.ru
[sudip: adjust context]
Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/powerpc/include/asm/ppc-opcode.h
arch/powerpc/kernel/idle_6xx.S
arch/powerpc/kernel/l2cr_6xx.S
arch/powerpc/kernel/swsusp_32.S
arch/powerpc/kernel/swsusp_asm64.S
arch/powerpc/mm/mmu_context.c
arch/powerpc/platforms/powermac/cache.S

index d9d5391b2af6f9d0cb1271e239bec72d44bf9afe..d0d3dab56225f31249ba06340b21c18191b83e88 100644 (file)
 #define PPC_INST_ICBT                  0x7c00002c
 #define PPC_INST_ICSWX                 0x7c00032d
 #define PPC_INST_ICSWEPX               0x7c00076d
+#define PPC_INST_DSSALL                        0x7e00066c
 #define PPC_INST_ISEL                  0x7c00001e
 #define PPC_INST_ISEL_MASK             0xfc00003e
 #define PPC_INST_LDARX                 0x7c0000a8
                                        __PPC_RA(a) | __PPC_RB(b))
 #define        PPC_DCBZL(a, b)         stringify_in_c(.long PPC_INST_DCBZL | \
                                        __PPC_RA(a) | __PPC_RB(b))
+#define PPC_DSSALL             stringify_in_c(.long PPC_INST_DSSALL)
 #define PPC_LQARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LQARX | \
                                        ___PPC_RT(t) | ___PPC_RA(a) | \
                                        ___PPC_RB(b) | __PPC_EH(eh))
index ff026c9d3cab42c3812d33fdc7d23cfbc5d1406b..75de66acc3d1baa20d1b49b8ad5895a04a4a3375 100644 (file)
@@ -133,7 +133,7 @@ BEGIN_FTR_SECTION
 END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM)
        mtspr   SPRN_HID0,r4
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
        sync
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
        CURRENT_THREAD_INFO(r9, r1)
index 6e7dbb7d527c8500b6810199af8924b311e54a25..9d4b42d115cdd73bf35bb6d03a923026ed673bee 100644 (file)
@@ -108,7 +108,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L2CR)
 
        /* Stop DST streams */
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
        sync
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 
@@ -305,7 +305,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)
        isync
 
        /* Stop DST streams */
-       DSSALL
+       PPC_DSSALL
        sync
 
        /* Get the current enable bit of the L3CR into r4 */
@@ -414,7 +414,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
 _GLOBAL(__flush_disable_L1)
        /* Stop pending alitvec streams and memory accesses */
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
        sync
 
index cbdf86228eaaa7c0d64082979d265e332de42bbc..54c44aea338c4cfae3fe9217a5a36bcbd977af14 100644 (file)
@@ -181,7 +181,7 @@ _GLOBAL(swsusp_arch_resume)
 #ifdef CONFIG_ALTIVEC
        /* Stop pending alitvec streams and memory accesses */
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 #endif
        sync
index f83bf6f72cb0e461af4780cba1825bf186b610a1..0af06f3dbb25ab9d9812b043f3123f21908af4be 100644 (file)
@@ -143,7 +143,7 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_LPAR)
 _GLOBAL(swsusp_arch_resume)
        /* Stop pending alitvec streams and memory accesses */
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
        sync
 
index f84e14f23e50aa49ee76c12e81e52f91b40bb4a0..78a638ccc70fc5e0a4866ccf2e6b3aee04fd80ca 100644 (file)
@@ -83,7 +83,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
         * context
         */
        if (cpu_has_feature(CPU_FTR_ALTIVEC))
-               asm volatile ("dssall");
+               asm volatile (PPC_DSSALL);
 
        if (new_on_cpu)
                radix_kvm_prefetch_workaround(next);
index 27862feee4a57b1a39ff2381aaa82b389ecdda8b..0dde4a7a601661a8bf69bd4299278131c8955228 100644 (file)
@@ -53,7 +53,7 @@ flush_disable_75x:
 
        /* Stop DST streams */
 BEGIN_FTR_SECTION
-       DSSALL
+       PPC_DSSALL
        sync
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 
@@ -201,7 +201,7 @@ flush_disable_745x:
        isync
 
        /* Stop prefetch streams */
-       DSSALL
+       PPC_DSSALL
        sync
 
        /* Disable L2 prefetching */