arm64: dts: renesas: r9a08g045: Add missing hypervisor virtual timer IRQ

[ Upstream commit 10f9badc473d43ebfddd1ddedbcb8eb3f8f3fdd9 ]

Add the missing fifth interrupt to the device node that represents the
ARM architected timer.  While at it, add an interrupt-names property for
clarity,

Fixes: e20396d65b959a65 ("arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/884c683fb6c1d1bf7d0d383a8df8f65a0a424dc7.1718890849.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
index f5f3f4f4c8d671f2b6f550ad07df17bc6532547e..a2adc4e27ce979613f7e79f707b38f10396f12cf 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
@@ -294,6 +294,9 @@
                interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
                                      <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
                                      <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
-                                     <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+                                     <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
+                                     <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
+               interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
+                                 "hyp-virt";
        };
 };