]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ASoC: rockchip: rockchip_i2s: Use guard() for spin locks
authorbui duc phuc <phucduc.bui@gmail.com>
Thu, 4 Jun 2026 03:35:51 +0000 (10:35 +0700)
committerMark Brown <broonie@kernel.org>
Thu, 11 Jun 2026 19:50:28 +0000 (20:50 +0100)
Clean up the code using guard() for spin locks.
Merely code refactoring, and no behavior change.

Signed-off-by: bui duc phuc <phucduc.bui@gmail.com>
Link: https://patch.msgid.link/20260604033554.96996-2-phucduc.bui@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/rockchip/rockchip_i2s.c

index 0a0a95b4f5204701b52ca924683d51c29992015d..5a5087f4ae03042d4aef436198a15d5372ead92f 100644 (file)
@@ -127,52 +127,52 @@ static int rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on)
        unsigned int val = 0;
        int ret = 0;
 
-       spin_lock(&i2s->lock);
-       if (on) {
-               ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
-                                        I2S_DMACR_TDE_ENABLE,
-                                        I2S_DMACR_TDE_ENABLE);
-               if (ret < 0)
-                       goto end;
-               ret = regmap_update_bits(i2s->regmap, I2S_XFER,
-                                        I2S_XFER_TXS_START | I2S_XFER_RXS_START,
-                                        I2S_XFER_TXS_START | I2S_XFER_RXS_START);
-               if (ret < 0)
-                       goto end;
-               i2s->tx_start = true;
-       } else {
-               i2s->tx_start = false;
-
-               ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
-                                        I2S_DMACR_TDE_ENABLE,
-                                        I2S_DMACR_TDE_DISABLE);
-               if (ret < 0)
-                       goto end;
-
-               if (!i2s->rx_start) {
+       scoped_guard(spinlock, &i2s->lock) {
+               if (on) {
+                       ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
+                                                I2S_DMACR_TDE_ENABLE,
+                                                I2S_DMACR_TDE_ENABLE);
+                       if (ret < 0)
+                               break;
                        ret = regmap_update_bits(i2s->regmap, I2S_XFER,
                                                 I2S_XFER_TXS_START | I2S_XFER_RXS_START,
-                                                I2S_XFER_TXS_STOP | I2S_XFER_RXS_STOP);
+                                                I2S_XFER_TXS_START | I2S_XFER_RXS_START);
                        if (ret < 0)
-                               goto end;
-                       udelay(150);
-                       ret = regmap_update_bits(i2s->regmap, I2S_CLR,
-                                                I2S_CLR_TXC | I2S_CLR_RXC,
-                                                I2S_CLR_TXC | I2S_CLR_RXC);
-                       if (ret < 0)
-                               goto end;
-                       ret = regmap_read_poll_timeout_atomic(i2s->regmap,
-                                                             I2S_CLR,
-                                                             val,
-                                                             val == 0,
-                                                             20,
-                                                             200);
+                               break;
+                       i2s->tx_start = true;
+               } else {
+                       i2s->tx_start = false;
+
+                       ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
+                                                I2S_DMACR_TDE_ENABLE,
+                                                I2S_DMACR_TDE_DISABLE);
                        if (ret < 0)
-                               dev_warn(i2s->dev, "fail to clear: %d\n", ret);
+                               break;
+
+                       if (!i2s->rx_start) {
+                               ret = regmap_update_bits(i2s->regmap, I2S_XFER,
+                                                        I2S_XFER_TXS_START | I2S_XFER_RXS_START,
+                                                        I2S_XFER_TXS_STOP | I2S_XFER_RXS_STOP);
+                               if (ret < 0)
+                                       break;
+                               udelay(150);
+                               ret = regmap_update_bits(i2s->regmap, I2S_CLR,
+                                                        I2S_CLR_TXC | I2S_CLR_RXC,
+                                                I2S_CLR_TXC | I2S_CLR_RXC);
+                               if (ret < 0)
+                                       break;
+                               ret = regmap_read_poll_timeout_atomic(i2s->regmap,
+                                                                     I2S_CLR,
+                                                                     val,
+                                                                     val == 0,
+                                                                     20,
+                                                                     200);
+                               if (ret < 0)
+                                       dev_warn(i2s->dev, "fail to clear: %d\n", ret);
+                       }
                }
        }
-end:
-       spin_unlock(&i2s->lock);
+
        if (ret < 0)
                dev_err(i2s->dev, "lrclk update failed\n");
 
@@ -184,53 +184,53 @@ static int rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on)
        unsigned int val = 0;
        int ret = 0;
 
-       spin_lock(&i2s->lock);
-       if (on) {
-               ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
-                                        I2S_DMACR_RDE_ENABLE,
-                                        I2S_DMACR_RDE_ENABLE);
-               if (ret < 0)
-                       goto end;
-
-               ret = regmap_update_bits(i2s->regmap, I2S_XFER,
-                                        I2S_XFER_TXS_START | I2S_XFER_RXS_START,
-                                        I2S_XFER_TXS_START | I2S_XFER_RXS_START);
-               if (ret < 0)
-                       goto end;
-               i2s->rx_start = true;
-       } else {
-               i2s->rx_start = false;
-
-               ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
-                                        I2S_DMACR_RDE_ENABLE,
-                                        I2S_DMACR_RDE_DISABLE);
-               if (ret < 0)
-                       goto end;
+       scoped_guard(spinlock, &i2s->lock) {
+               if (on) {
+                       ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
+                                                I2S_DMACR_RDE_ENABLE,
+                                                I2S_DMACR_RDE_ENABLE);
+                       if (ret < 0)
+                               break;
 
-               if (!i2s->tx_start) {
                        ret = regmap_update_bits(i2s->regmap, I2S_XFER,
                                                 I2S_XFER_TXS_START | I2S_XFER_RXS_START,
-                                                I2S_XFER_TXS_STOP | I2S_XFER_RXS_STOP);
+                                                I2S_XFER_TXS_START | I2S_XFER_RXS_START);
                        if (ret < 0)
-                               goto end;
-                       udelay(150);
-                       ret = regmap_update_bits(i2s->regmap, I2S_CLR,
-                                                I2S_CLR_TXC | I2S_CLR_RXC,
-                                                I2S_CLR_TXC | I2S_CLR_RXC);
-                       if (ret < 0)
-                               goto end;
-                       ret = regmap_read_poll_timeout_atomic(i2s->regmap,
-                                                             I2S_CLR,
-                                                             val,
-                                                             val == 0,
-                                                             20,
-                                                             200);
+                               break;
+                       i2s->rx_start = true;
+               } else {
+                       i2s->rx_start = false;
+
+                       ret = regmap_update_bits(i2s->regmap, I2S_DMACR,
+                                                I2S_DMACR_RDE_ENABLE,
+                                                I2S_DMACR_RDE_DISABLE);
                        if (ret < 0)
-                               dev_warn(i2s->dev, "fail to clear: %d\n", ret);
+                               break;
+
+                       if (!i2s->tx_start) {
+                               ret = regmap_update_bits(i2s->regmap, I2S_XFER,
+                                                        I2S_XFER_TXS_START | I2S_XFER_RXS_START,
+                                                        I2S_XFER_TXS_STOP | I2S_XFER_RXS_STOP);
+                               if (ret < 0)
+                                       break;
+                               udelay(150);
+                               ret = regmap_update_bits(i2s->regmap, I2S_CLR,
+                                                        I2S_CLR_TXC | I2S_CLR_RXC,
+                                                        I2S_CLR_TXC | I2S_CLR_RXC);
+                               if (ret < 0)
+                                       break;
+                               ret = regmap_read_poll_timeout_atomic(i2s->regmap,
+                                                                     I2S_CLR,
+                                                                     val,
+                                                                     val == 0,
+                                                                     20,
+                                                                     200);
+                               if (ret < 0)
+                                       dev_warn(i2s->dev, "fail to clear: %d\n", ret);
+                       }
                }
        }
-end:
-       spin_unlock(&i2s->lock);
+
        if (ret < 0)
                dev_err(i2s->dev, "lrclk update failed\n");