]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
.32 patch
authorGreg Kroah-Hartman <gregkh@suse.de>
Wed, 7 Apr 2010 16:06:07 +0000 (09:06 -0700)
committerGreg Kroah-Hartman <gregkh@suse.de>
Wed, 7 Apr 2010 16:06:07 +0000 (09:06 -0700)
queue-2.6.32/lis3-fix-show-rate-for-8-bits-chips.patch [new file with mode: 0644]
queue-2.6.32/series

diff --git a/queue-2.6.32/lis3-fix-show-rate-for-8-bits-chips.patch b/queue-2.6.32/lis3-fix-show-rate-for-8-bits-chips.patch
new file mode 100644 (file)
index 0000000..30e2596
--- /dev/null
@@ -0,0 +1,89 @@
+From 4b5d95b3809bcd77599122494aa3f575cd6ab1b9 Mon Sep 17 00:00:00 2001
+From: Éric Piel <eric.piel@tremplin-utc.net>
+Date: Mon, 14 Dec 2009 18:01:40 -0800
+Subject: lis3: fix show rate for 8 bits chips
+
+From: Éric Piel <eric.piel@tremplin-utc.net>
+
+commit 4b5d95b3809bcd77599122494aa3f575cd6ab1b9 upstream.
+
+Originally the driver was only targeted to 12bits sensors.  When support
+for 8bits sensors was added, some slight difference in the registers were
+overlooked.  This should fix it, both for initialization, and for
+displaying the rate.
+
+Reported-by: Kalhan Trisal <kalhan.trisal@intel.com>
+Reported-by: Christoph Plattner <christoph.plattner@gmx.at>
+Tested-by: Christoph Plattner <christoph.plattner@gmx.at>
+Tested-by: Samu Onkalo <samu.p.onkalo@nokia.com>
+Signed-off-by: Éric Piel <eric.piel@tremplin-utc.net>
+Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
+Cc: Pavel Machek <pavel@ucw.cz>
+Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Cc: Takashi Iwai <tiwai@suse.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/hwmon/lis3lv02d.c |   24 ++++++++++++++++--------
+ drivers/hwmon/lis3lv02d.h |    1 +
+ 2 files changed, 17 insertions(+), 8 deletions(-)
+
+--- a/drivers/hwmon/lis3lv02d.c
++++ b/drivers/hwmon/lis3lv02d.c
+@@ -127,12 +127,14 @@ void lis3lv02d_poweron(struct lis3lv02d
+       /*
+        * Common configuration
+-       * BDU: LSB and MSB values are not updated until both have been read.
+-       *      So the value read will always be correct.
++       * BDU: (12 bits sensors only) LSB and MSB values are not updated until
++       *      both have been read. So the value read will always be correct.
+        */
+-      lis3->read(lis3, CTRL_REG2, &reg);
+-      reg |= CTRL2_BDU;
+-      lis3->write(lis3, CTRL_REG2, reg);
++      if (lis3->whoami ==  WAI_12B) {
++              lis3->read(lis3, CTRL_REG2, &reg);
++              reg |= CTRL2_BDU;
++              lis3->write(lis3, CTRL_REG2, reg);
++      }
+ }
+ EXPORT_SYMBOL_GPL(lis3lv02d_poweron);
+@@ -361,7 +363,8 @@ static ssize_t lis3lv02d_calibrate_store
+ }
+ /* conversion btw sampling rate and the register values */
+-static int lis3lv02dl_df_val[4] = {40, 160, 640, 2560};
++static int lis3_12_rates[4] = {40, 160, 640, 2560};
++static int lis3_8_rates[2] = {100, 400};
+ static ssize_t lis3lv02d_rate_show(struct device *dev,
+                       struct device_attribute *attr, char *buf)
+ {
+@@ -369,8 +372,13 @@ static ssize_t lis3lv02d_rate_show(struc
+       int val;
+       lis3_dev.read(&lis3_dev, CTRL_REG1, &ctrl);
+-      val = (ctrl & (CTRL1_DF0 | CTRL1_DF1)) >> 4;
+-      return sprintf(buf, "%d\n", lis3lv02dl_df_val[val]);
++
++      if (lis3_dev.whoami == WAI_12B)
++              val = lis3_12_rates[(ctrl & (CTRL1_DF0 | CTRL1_DF1)) >> 4];
++      else
++              val = lis3_8_rates[(ctrl & CTRL1_DR) >> 7];
++
++      return sprintf(buf, "%d\n", val);
+ }
+ static DEVICE_ATTR(position, S_IRUGO, lis3lv02d_position_show, NULL);
+--- a/drivers/hwmon/lis3lv02d.h
++++ b/drivers/hwmon/lis3lv02d.h
+@@ -103,6 +103,7 @@ enum lis3lv02d_ctrl1 {
+       CTRL1_DF1       = 0x20,
+       CTRL1_PD0       = 0x40,
+       CTRL1_PD1       = 0x80,
++      CTRL1_DR        = 0x80, /* Data rate on 8 bits */
+ };
+ enum lis3lv02d_ctrl2 {
+       CTRL2_DAS       = 0x01,
index 037085f21d7b7446a8664efc7e2f7b5569cbbf27..e85148eea253cc16a47b7640433316fcd291d8c2 100644 (file)
@@ -39,3 +39,4 @@ watchdog-hpwdt-fix-lower-timeout-limit.patch
 watchdog-itco_wdt-tco-watchdog-patch-for-additional-intel-cougar-point-deviceids.patch
 genirq-force-msi-irq-handlers-to-run-with-interrupts-disabled.patch
 tty-release_one_tty-forgets-to-put-pids.patch
+lis3-fix-show-rate-for-8-bits-chips.patch