]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
IB/mlx5: Rename 400G_8X speed to comply to naming convention
authorPatrisious Haddad <phaddad@nvidia.com>
Wed, 20 Sep 2023 10:07:43 +0000 (13:07 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 18 Sep 2024 17:24:08 +0000 (19:24 +0200)
[ Upstream commit b28ad32442bec2f0d9cb660d7d698a1a53c13d08 ]

Rename 400G_8X speed to comply to naming convention.

Signed-off-by: Patrisious Haddad <phaddad@nvidia.com>
Reviewed-by: Mark Zhang <markzhang@nvidia.com>
Link: https://lore.kernel.org/r/ac98447cac8379a43fbdb36d56e5fb2b741a97ff.1695204156.git.leon@kernel.org
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Stable-dep-of: 80bf474242b2 ("net/mlx5e: Add missing link mode to ptys2ext_ethtool_map")
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/infiniband/hw/mlx5/main.c
drivers/net/ethernet/mellanox/mlx5/core/port.c
include/linux/mlx5/port.h

index 45a497c0258b30f71e2ee27891579d873a275485..2d179bc56ce608670138223c63973ac1d9f2f1a6 100644 (file)
@@ -444,7 +444,7 @@ static int translate_eth_ext_proto_oper(u32 eth_proto_oper, u16 *active_speed,
                *active_width = IB_WIDTH_2X;
                *active_speed = IB_SPEED_NDR;
                break;
-       case MLX5E_PROT_MASK(MLX5E_400GAUI_8):
+       case MLX5E_PROT_MASK(MLX5E_400GAUI_8_400GBASE_CR8):
                *active_width = IB_WIDTH_8X;
                *active_speed = IB_SPEED_HDR;
                break;
index be70d1f23a5da311ad725dd57f83a43b1bd99822..749f0fc2c189ad99c35226c442d80945e2da7581 100644 (file)
@@ -1098,7 +1098,7 @@ static const u32 mlx5e_ext_link_speed[MLX5E_EXT_LINK_MODES_NUMBER] = {
        [MLX5E_CAUI_4_100GBASE_CR4_KR4] = 100000,
        [MLX5E_100GAUI_2_100GBASE_CR2_KR2] = 100000,
        [MLX5E_200GAUI_4_200GBASE_CR4_KR4] = 200000,
-       [MLX5E_400GAUI_8] = 400000,
+       [MLX5E_400GAUI_8_400GBASE_CR8] = 400000,
        [MLX5E_100GAUI_1_100GBASE_CR_KR] = 100000,
        [MLX5E_200GAUI_2_200GBASE_CR2_KR2] = 200000,
        [MLX5E_400GAUI_4_400GBASE_CR4_KR4] = 400000,
index 98b2e1e149f93c2c735e0333d5de621b49b39c4d..5cc34216f23c32b67764b6d3846081b7c4a9eb8b 100644 (file)
@@ -115,7 +115,7 @@ enum mlx5e_ext_link_mode {
        MLX5E_100GAUI_1_100GBASE_CR_KR          = 11,
        MLX5E_200GAUI_4_200GBASE_CR4_KR4        = 12,
        MLX5E_200GAUI_2_200GBASE_CR2_KR2        = 13,
-       MLX5E_400GAUI_8                         = 15,
+       MLX5E_400GAUI_8_400GBASE_CR8            = 15,
        MLX5E_400GAUI_4_400GBASE_CR4_KR4        = 16,
        MLX5E_EXT_LINK_MODES_NUMBER,
 };