Xilinx: ARM: nand: Add sub-page read support

Add and enable functions for handling sub-page reads
Due to poor organization of this driver, the options mask has to be
modified to not clobber the subpage option in nand_base.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

diff --git a/drivers/mtd/nand/zynq_nand.c b/drivers/mtd/nand/zynq_nand.c
index 667eb39b4c5c5a81c4f6b692484f3ec3f89c7b6e..33fec9a0f1a8f7a018e1e9bd8fae3aa411ad5efa 100644 (file)
--- a/drivers/mtd/nand/zynq_nand.c
+++ b/drivers/mtd/nand/zynq_nand.c
@@ -517,6 +517,18 @@ static int xnandps_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
        return 0;
 }
 
+static int xnandps_read_subpage_raw(struct mtd_info *mtd, struct nand_chip *chip,
+                                       uint32_t data_offs, uint32_t readlen, uint8_t *buf)
+{
+       if (data_offs != 0) {
+               chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_offs, -1);
+               buf += data_offs;
+       }
+
+       chip->read_buf(mtd, buf, readlen);
+       return 0;
+}
+
 /**
  * xnandps_write_page_raw - [Intern] raw page write function
  * @mtd:        mtd info structure
@@ -1200,6 +1212,7 @@ int zynq_nand_init(struct nand_chip *nand_chip)
                                SMC controller */
                nand_chip->ecc.mode = NAND_ECC_HW;
                nand_chip->ecc.read_page = xnandps_read_page_raw;
+               nand_chip->ecc.read_subpage = xnandps_read_subpage_raw;
                nand_chip->ecc.write_page = xnandps_write_page_raw;
                nand_chip->ecc.read_page_raw = xnandps_read_page_raw;
                nand_chip->ecc.write_page_raw = xnandps_write_page_raw;
@@ -1208,6 +1221,9 @@ int zynq_nand_init(struct nand_chip *nand_chip)
                nand_chip->ecc.size = mtd->writesize;
                nand_chip->ecc.bytes = 0;
 
+               /* NAND with on-die ECC supports subpage reads */
+               nand_chip->options |= NAND_SUBPAGE_READ;
+
                /* On-Die ECC spare bytes offset 8 is used for ECC codes */
                if (ondie_ecc_enabled) {
                        nand_chip->ecc.layout = &ondie_nand_oob_64;

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 34188c783f702c92e4a8e0ee15b87ecb803c3d32..b60cf4091a338d4a0144367c7fa751cd544c1893 100644 (file)
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -194,7 +194,7 @@ typedef enum {
 #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ))
 
 /* Mask to zero out the chip options, which come from the id table */
-#define NAND_CHIPOPTIONS_MSK   (0x0000ffff & ~NAND_NO_AUTOINCR)
+#define NAND_CHIPOPTIONS_MSK   (0x0000efff & ~NAND_NO_AUTOINCR)
 
 /* Non chip related options */
 /* Use a flash based bad block table. This option is passed to the