- Moved VG_MAX_REALREGS into x86/ part.
- Tweaked basic types so they're suitable for both 32-bit and 64-bit platforms.
Main change was to change 'Addr' to "unsigned long" which is the same size as
a pointer. Had to make a couple of minor changes to accommodate this.
Also, introduced 'UWord' and 'Word' types which will be necessary for making
code 64-bit clean.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@2669
extern void VG_(missing_tool_func) ( const Char* fn );
/* ---------------------------------------------------------------------
- The state of the simulated CPU.
+ The baseBlock -- arch-neutral bits
------------------------------------------------------------------ */
#define INVALID_OFFSET (-1)
if (0)
printf("stringsize=%d auxsize=%d stacksize=%d\n"
- "clstk_base %x\n"
- "clstk_end %x\n",
- stringsize, auxsize, stacksize, VG_(clstk_base), VG_(clstk_end));
+ "clstk_base %p\n"
+ "clstk_end %p\n",
+ stringsize, auxsize, stacksize,
+ (void*)VG_(clstk_base), (void*)VG_(clstk_end));
/* ==================== allocate space ==================== */
esp_at_startup = setup_client_stack(cl_argv, env, &info, &client_auxv);
if (0)
- printf("entry=%x client esp=%x vg_argc=%d brkbase=%x\n",
- client_eip, esp_at_startup, vg_argc, VG_(brk_base));
+ printf("entry=%p client esp=%p vg_argc=%d brkbase=%p\n",
+ (void*)client_eip, (void*)esp_at_startup, vg_argc,
+ (void*)VG_(brk_base));
//==============================================================
// Finished setting up operating environment. Now initialise
return 1;
}
-static Int readhex ( Char* buf, UInt* val )
+static Int readhex ( Char* buf, UWord* val )
{
Int n = 0;
*val = 0;
Int i, j, i_eol;
Addr start, endPlusOne;
UChar* filename;
- UInt foffset;
UChar rr, ww, xx, pp, ch, tmp;
- UInt maj, min, ino;
+ UInt ino;
+ UWord foffset, maj, min;
sk_assert( '\0' != procmap_buf[0] && 0 != buf_n_tot);
static
void eraser_pre_mem_read(CorePart part, ThreadId tid,
- Char* s, UInt base, UInt size )
+ Char* s, Addr base, UInt size )
{
if (tid > 50) { VG_(printf)("pid = %d, s = `%s`, part = %d\n", tid, s, part); VG_(skin_panic)("a");}
eraser_mem_read(base, size, tid);
static
void eraser_pre_mem_read_asciiz(CorePart part, ThreadId tid,
- Char* s, UInt base )
+ Char* s, Addr base )
{
eraser_mem_read(base, VG_(strlen)((Char*)base), tid);
}
static
void eraser_pre_mem_write(CorePart part, ThreadId tid,
- Char* s, UInt base, UInt size )
+ Char* s, Addr base, UInt size )
{
eraser_mem_write(base, size, tid);
}
/*=== Basic types ===*/
/*====================================================================*/
-typedef unsigned char UChar;
-typedef unsigned short UShort;
-typedef unsigned int UInt;
-typedef unsigned long long int ULong;
-
-typedef signed char Char;
-typedef signed short Short;
-typedef signed int Int;
-typedef signed long long int Long;
-
-typedef unsigned int Addr;
-
-typedef unsigned char Bool;
+// By choosing the right types, we can get these right for 32-bit and 64-bit
+// platforms without having to do any conditional compilation or anything.
+//
+// Size in bits on: 32-bit archs 64-bit archs
+// ------------ ------------
+typedef unsigned char UChar; // 8 8
+typedef unsigned short UShort; // 16 16
+typedef unsigned int UInt; // 32 32
+typedef unsigned long UWord; // 32 64
+typedef unsigned long long ULong; // 64 64
+
+typedef signed char Char; // 8 8
+typedef signed short Short; // 16 16
+typedef signed int Int; // 32 32
+typedef signed long Word; // 32 64
+typedef signed long long Long; // 64 64
+
+typedef UWord Addr; // 32 64
+
+typedef UChar Bool; // 8 8
#define False ((Bool)0)
#define True ((Bool)1)
the need for a higher number presents itself. */
#define VG_N_THREAD_KEYS 50
-/* Total number of integer registers available for allocation -- all of
- them except %esp, %ebp. %ebp permanently points at VG_(baseBlock).
-
- If you increase this you'll have to also change at least these:
- - VG_(rank_to_realreg)()
- - VG_(realreg_to_rank)()
- - ppRegsLiveness()
- - the RegsLive type (maybe -- RegsLive type must have more than
- VG_MAX_REALREGS bits)
-
- You can decrease it, and performance will drop because more spills will
- occur. If you decrease it too much, everything will fall over.
-
- Do not change this unless you really know what you are doing! */
-#define VG_MAX_REALREGS 6
-
/*====================================================================*/
/*=== Useful macros ===*/
#define MIN_INSTR_SIZE 1
#define MAX_INSTR_SIZE 16
+/* Total number of integer registers available for allocation -- all of
+ them except %esp (points to Valgrind's stack) and %ebp (permanently
+ points at the baseBlock).
+
+ If you increase this you'll have to also change at least these:
+ - VG_(rank_to_realreg)()
+ - VG_(realreg_to_rank)()
+ - ppRegsLiveness()
+ - the RegsLive type (maybe -- RegsLive type must have more than
+ VG_MAX_REALREGS bits)
+
+ You can decrease it, and performance will drop because more spills will
+ occur. If you decrease it too much, everything will fall over.
+
+ Do not change this unless you really know what you are doing! */
+#define VG_MAX_REALREGS 6
+
/*====================================================================*/
/*=== Instrumenting UCode ===*/