]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
powerpc: dts: mpc8315erdb: Use IRQ_TYPE_* macros
authorJ. Neuschäfer <j.ne@posteo.net>
Tue, 3 Mar 2026 15:50:52 +0000 (16:50 +0100)
committerMadhavan Srinivasan <maddy@linux.ibm.com>
Sat, 7 Mar 2026 10:32:27 +0000 (16:02 +0530)
This increases readability, because "0x8" isn't very descriptive.

mpc8315erdb.dtb remains identical after this patch.

Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20260303-mpc83xx-cleanup-v2-2-187d3a13effa@posteo.net
arch/powerpc/boot/dts/mpc8315erdb.dts

index a8f68d6e50b0ddfeffca939254f850a2e119d3a2..1957b6687b29871961ec6dc79206d808ae8f76ef 100644 (file)
@@ -50,7 +50,7 @@
                #size-cells = <1>;
                compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
                reg = <0xe0005000 0x1000>;
-               interrupts = <77 0x8>;
+               interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
                interrupt-parent = <&ipic>;
 
                // CS0 and CS1 are swapped when
                        cell-index = <0>;
                        compatible = "fsl-i2c";
                        reg = <0x3000 0x100>;
-                       interrupts = <14 0x8>;
+                       interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                        dfsrr;
                        rtc@68 {
                        cell-index = <0>;
                        compatible = "fsl,spi";
                        reg = <0x7000 0x1000>;
-                       interrupts = <16 0x8>;
+                       interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                        mode = "cpu";
                };
                        reg = <0x82a8 4>;
                        ranges = <0 0x8100 0x1a8>;
                        interrupt-parent = <&ipic>;
-                       interrupts = <71 8>;
+                       interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
                        cell-index = <0>;
                        dma-channel@0 {
                                compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
                                reg = <0 0x80>;
                                cell-index = <0>;
                                interrupt-parent = <&ipic>;
-                               interrupts = <71 8>;
+                               interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
                        };
                        dma-channel@80 {
                                compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
                                reg = <0x80 0x80>;
                                cell-index = <1>;
                                interrupt-parent = <&ipic>;
-                               interrupts = <71 8>;
+                               interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
                        };
                        dma-channel@100 {
                                compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
                                reg = <0x100 0x80>;
                                cell-index = <2>;
                                interrupt-parent = <&ipic>;
-                               interrupts = <71 8>;
+                               interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
                        };
                        dma-channel@180 {
                                compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
                                reg = <0x180 0x28>;
                                cell-index = <3>;
                                interrupt-parent = <&ipic>;
-                               interrupts = <71 8>;
+                               interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
                        };
                };
 
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupt-parent = <&ipic>;
-                       interrupts = <38 0x8>;
+                       interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
                        phy_type = "utmi";
                };
 
                        reg = <0x24000 0x1000>;
                        ranges = <0x0 0x24000 0x1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <32 0x8 33 0x8 34 0x8>;
+                       interrupts = <32 IRQ_TYPE_LEVEL_LOW>,
+                                    <33 IRQ_TYPE_LEVEL_LOW>,
+                                    <34 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                        tbi-handle = <&tbi0>;
                        phy-handle = < &phy0 >;
                        reg = <0x25000 0x1000>;
                        ranges = <0x0 0x25000 0x1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
-                       interrupts = <35 0x8 36 0x8 37 0x8>;
+                       interrupts = <35 IRQ_TYPE_LEVEL_LOW>,
+                                    <36 IRQ_TYPE_LEVEL_LOW>,
+                                    <37 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                        tbi-handle = <&tbi1>;
                        phy-handle = < &phy1 >;
                        compatible = "fsl,ns16550", "ns16550";
                        reg = <0x4500 0x100>;
                        clock-frequency = <133333333>;
-                       interrupts = <9 0x8>;
+                       interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                };
 
                        compatible = "fsl,ns16550", "ns16550";
                        reg = <0x4600 0x100>;
                        clock-frequency = <133333333>;
-                       interrupts = <10 0x8>;
+                       interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                };
 
                                     "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
                                     "fsl,sec2.0";
                        reg = <0x30000 0x10000>;
-                       interrupts = <11 0x8>;
+                       interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                        fsl,num-channels = <4>;
                        fsl,channel-fifo-len = <24>;
                        compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
                        reg = <0x18000 0x1000>;
                        cell-index = <1>;
-                       interrupts = <44 0x8>;
+                       interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                };
 
                        compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
                        reg = <0x19000 0x1000>;
                        cell-index = <2>;
-                       interrupts = <45 0x8>;
+                       interrupts = <45 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                };
 
                gtm1: timer@500 {
                        compatible = "fsl,mpc8315-gtm", "fsl,gtm";
                        reg = <0x500 0x100>;
-                       interrupts = <90 8 78 8 84 8 72 8>;
+                       interrupts = <90 IRQ_TYPE_LEVEL_LOW>,
+                                    <78 IRQ_TYPE_LEVEL_LOW>,
+                                    <84 IRQ_TYPE_LEVEL_LOW>,
+                                    <72 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                        clock-frequency = <133333333>;
                };
                timer@600 {
                        compatible = "fsl,mpc8315-gtm", "fsl,gtm";
                        reg = <0x600 0x100>;
-                       interrupts = <91 8 79 8 85 8 73 8>;
+                       interrupts = <91 IRQ_TYPE_LEVEL_LOW>,
+                                    <79 IRQ_TYPE_LEVEL_LOW>,
+                                    <85 IRQ_TYPE_LEVEL_LOW>,
+                                    <73 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                        clock-frequency = <133333333>;
                };
 
                /* IPIC
-                * interrupts cell = <intr #, sense>
-                * sense values match linux IORESOURCE_IRQ_* defines:
-                * sense == 8: Level, low assertion
-                * sense == 2: Edge, high-to-low change
+                * interrupts cell = <intr #, type>
                 */
                ipic: interrupt-controller@700 {
                        interrupt-controller;
                        compatible = "fsl,ipic-msi";
                        reg = <0x7c0 0x40>;
                        msi-available-ranges = <0 0x100>;
-                       interrupts = <0x43 0x8
-                                     0x4  0x8
-                                     0x51 0x8
-                                     0x52 0x8
-                                     0x56 0x8
-                                     0x57 0x8
-                                     0x58 0x8
-                                     0x59 0x8>;
+                       interrupts = <0x43 IRQ_TYPE_LEVEL_LOW
+                                     0x4  IRQ_TYPE_LEVEL_LOW
+                                     0x51 IRQ_TYPE_LEVEL_LOW
+                                     0x52 IRQ_TYPE_LEVEL_LOW
+                                     0x56 IRQ_TYPE_LEVEL_LOW
+                                     0x57 IRQ_TYPE_LEVEL_LOW
+                                     0x58 IRQ_TYPE_LEVEL_LOW
+                                     0x59 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = < &ipic >;
                };
 
                        compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc",
                                     "fsl,mpc8349-pmc";
                        reg = <0xb00 0x100 0xa00 0x100>;
-                       interrupts = <80 8>;
+                       interrupts = <80 IRQ_TYPE_LEVEL_LOW>;
                        interrupt-parent = <&ipic>;
                        fsl,mpc8313-wakeup-timer = <&gtm1>;
                };
                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                interrupt-map = <
                                /* IDSEL 0x0E -mini PCI */
-                                0x7000 0x0 0x0 0x1 &ipic 18 0x8
-                                0x7000 0x0 0x0 0x2 &ipic 18 0x8
-                                0x7000 0x0 0x0 0x3 &ipic 18 0x8
-                                0x7000 0x0 0x0 0x4 &ipic 18 0x8
+                                0x7000 0x0 0x0 0x1 &ipic 18 IRQ_TYPE_LEVEL_LOW
+                                0x7000 0x0 0x0 0x2 &ipic 18 IRQ_TYPE_LEVEL_LOW
+                                0x7000 0x0 0x0 0x3 &ipic 18 IRQ_TYPE_LEVEL_LOW
+                                0x7000 0x0 0x0 0x4 &ipic 18 IRQ_TYPE_LEVEL_LOW
 
                                /* IDSEL 0x0F -mini PCI */
-                                0x7800 0x0 0x0 0x1 &ipic 17 0x8
-                                0x7800 0x0 0x0 0x2 &ipic 17 0x8
-                                0x7800 0x0 0x0 0x3 &ipic 17 0x8
-                                0x7800 0x0 0x0 0x4 &ipic 17 0x8
+                                0x7800 0x0 0x0 0x1 &ipic 17 IRQ_TYPE_LEVEL_LOW
+                                0x7800 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW
+                                0x7800 0x0 0x0 0x3 &ipic 17 IRQ_TYPE_LEVEL_LOW
+                                0x7800 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW
 
                                /* IDSEL 0x10 - PCI slot */
-                                0x8000 0x0 0x0 0x1 &ipic 48 0x8
-                                0x8000 0x0 0x0 0x2 &ipic 17 0x8
-                                0x8000 0x0 0x0 0x3 &ipic 48 0x8
-                                0x8000 0x0 0x0 0x4 &ipic 17 0x8>;
+                                0x8000 0x0 0x0 0x1 &ipic 48 IRQ_TYPE_LEVEL_LOW
+                                0x8000 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW
+                                0x8000 0x0 0x0 0x3 &ipic 48 IRQ_TYPE_LEVEL_LOW
+                                0x8000 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW>;
                interrupt-parent = <&ipic>;
-               interrupts = <66 0x8>;
+               interrupts = <66 IRQ_TYPE_LEVEL_LOW>;
                bus-range = <0x0 0x0>;
                ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
                          0x42000000 0 0x80000000 0x80000000 0 0x10000000
                          0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
                bus-range = <0 255>;
                interrupt-map-mask = <0xf800 0 0 7>;
-               interrupt-map = <0 0 0 1 &ipic 1 8
-                                0 0 0 2 &ipic 1 8
-                                0 0 0 3 &ipic 1 8
-                                0 0 0 4 &ipic 1 8>;
+               interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW
+                                0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW
+                                0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW
+                                0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>;
                clock-frequency = <0>;
 
                pcie@0 {
                          0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
                bus-range = <0 255>;
                interrupt-map-mask = <0xf800 0 0 7>;
-               interrupt-map = <0 0 0 1 &ipic 2 8
-                                0 0 0 2 &ipic 2 8
-                                0 0 0 3 &ipic 2 8
-                                0 0 0 4 &ipic 2 8>;
+               interrupt-map = <0 0 0 1 &ipic 2 IRQ_TYPE_LEVEL_LOW
+                                0 0 0 2 &ipic 2 IRQ_TYPE_LEVEL_LOW
+                                0 0 0 3 &ipic 2 IRQ_TYPE_LEVEL_LOW
+                                0 0 0 4 &ipic 2 IRQ_TYPE_LEVEL_LOW>;
                clock-frequency = <0>;
 
                pcie@0 {