]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
ASoC: rt5650: enhance spk protection function
authorShuming Fan <shumingf@realtek.com>
Mon, 15 Jun 2026 09:10:12 +0000 (17:10 +0800)
committerMark Brown <broonie@kernel.org>
Wed, 17 Jun 2026 13:57:29 +0000 (14:57 +0100)
This patch adjusts several default settings to ensure
the speaker protection function can be enabled safely.

Signed-off-by: Shuming Fan <shumingf@realtek.com>
Link: https://patch.msgid.link/20260615091012.718168-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/rt5645.c
sound/soc/codecs/rt5645.h

index 8a9af260e5f7fe9561a995377d47280d07b70783..e9819653b30d6a7baef7ab6576bc58a3e9b7b91e 100644 (file)
@@ -83,6 +83,8 @@ static const struct reg_sequence rt5650_init_list[] = {
        {RT5645_PWR_ANLG1, 0x02},
        {RT5645_IL_CMD3, 0x6728},
        {RT5645_PR_BASE + 0x3a, 0x0000},
+       {RT5645_CLSD_OUT_CTRL1, 0x4059},
+       {RT5645_GEN_CTRL3, 0x0200},
 };
 
 static const struct reg_default rt5645_reg[] = {
@@ -1855,13 +1857,9 @@ static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
                        RT5645_PWR_CLS_D_L,
                        RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
                        RT5645_PWR_CLS_D_L);
-               snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
-                       RT5645_DET_CLK_MASK, RT5645_DET_CLK_MODE1);
                break;
 
        case SND_SOC_DAPM_PRE_PMD:
-               snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
-                       RT5645_DET_CLK_MASK, RT5645_DET_CLK_DIS);
                snd_soc_component_write(component, RT5645_EQ_CTRL2, 0);
                snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
                        RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
index bef74b29fd541b5478c44034c2dd6df30a82c2ff..a5bfe9861b8ba9540229b0af31d4f2ff3b6c80db 100644 (file)
 #define RT5645_A_JD_CTRL1                      0x94
 #define RT5645_VAD_CTRL4                       0x9d
 #define RT5645_CLSD_OUT_CTRL                   0xa0
+#define RT5645_CLSD_OUT_CTRL1                  0xa1
 /* Function - Digital */
 #define RT5645_ADC_EQ_CTRL1                    0xae
 #define RT5645_ADC_EQ_CTRL2                    0xaf