]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
zynqmp: Setup clocks based on arm global timer
authorMichal Simek <michal.simek@xilinx.com>
Fri, 5 Sep 2014 11:16:49 +0000 (13:16 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Fri, 5 Sep 2014 11:32:41 +0000 (13:32 +0200)
cntfrq_el0 is setup by ATF(or different firmware)
running in EL3. If u-boot runs in EL3, setup is done by
u-boot itself to 4MHz.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/cpu/armv8/zynqmp/clk.c
include/configs/xilinx_zynqmp.h

index 2c51ad2901b1cbe98d2041d70a11daab9a69bd2b..03d342271405af0077e2b60f59790c907252f3e0 100644 (file)
@@ -9,6 +9,8 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 unsigned long get_uart_clk(int dev_id)
 {
        u32 ver = zynqmp_get_silicon_version();
@@ -27,3 +29,23 @@ unsigned long get_ttc_clk(int dev_id)
 {
        return get_uart_clk(dev_id);
 }
+
+#ifdef CONFIG_CLOCKS
+/**
+ * set_cpu_clk_info() - Initialize clock framework
+ * Always returns zero.
+ *
+ * This function is called from common code after relocation and sets up the
+ * clock framework. The framework must not be used before this function had been
+ * called.
+ */
+int set_cpu_clk_info(void)
+{
+       gd->cpu_clk = get_tbclk();
+
+       gd->bd->bi_arm_freq = gd->cpu_clk / 1000000;
+       gd->bd->bi_dsp_freq = 0;
+
+       return 0;
+}
+#endif
index cbbc91f47a28ccc19fb5d225543a3eb78227a12a..2c69bcb1477763fda47a70f2eae3e7462e537cea 100644 (file)
 #define CONFIG_CMD_BOOTI
 #define CONFIG_CMD_UNZIP
 
+#define CONFIG_CLOCKS
+
 #endif /* __XILINX_ZYNQMP_H */