arm_mpam: resctrl: Pick the caches we will use as resctrl resources

Systems with MPAM support may have a variety of control types at any point
of their system layout. We can only expose certain types of control, and
only if they exist at particular locations.

Start with the well-known caches. These have to be depth 2 or 3 and support
MPAM's cache portion bitmap controls, with a number of portions fewer than
resctrl's limit.

Tested-by: Gavin Shan <gshan@redhat.com>
Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Tested-by: Peter Newman <peternewman@google.com>
Tested-by: Zeng Heng <zengheng4@huawei.com>
Tested-by: Punit Agrawal <punit.agrawal@oss.qualcomm.com>
Tested-by: Jesse Chick <jessechick@os.amperecomputing.com>
Reviewed-by: Zeng Heng <zengheng4@huawei.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Co-developed-by: Ben Horgan <ben.horgan@arm.com>
Signed-off-by: Ben Horgan <ben.horgan@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>

diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c
index 9a3070970414266ec6f3ceb90692f587f1c77a83..65bb670dc3fb15d1d4ab83ee547308c74c001567 100644 (file)
--- a/drivers/resctrl/mpam_resctrl.c
+++ b/drivers/resctrl/mpam_resctrl.c
@@ -65,9 +65,95 @@ struct rdt_resource *resctrl_arch_get_resource(enum resctrl_res_level l)
        return &mpam_resctrl_controls[l].resctrl_res;
 }
 
+static bool cache_has_usable_cpor(struct mpam_class *class)
+{
+       struct mpam_props *cprops = &class->props;
+
+       if (!mpam_has_feature(mpam_feat_cpor_part, cprops))
+               return false;
+
+       /* resctrl uses u32 for all bitmap configurations */
+       return class->props.cpbm_wd <= 32;
+}
+
+/* Test whether we can export MPAM_CLASS_CACHE:{2,3}? */
+static void mpam_resctrl_pick_caches(void)
+{
+       struct mpam_class *class;
+       struct mpam_resctrl_res *res;
+
+       lockdep_assert_cpus_held();
+
+       guard(srcu)(&mpam_srcu);
+       list_for_each_entry_srcu(class, &mpam_classes, classes_list,
+                                srcu_read_lock_held(&mpam_srcu)) {
+               if (class->type != MPAM_CLASS_CACHE) {
+                       pr_debug("class %u is not a cache\n", class->level);
+                       continue;
+               }
+
+               if (class->level != 2 && class->level != 3) {
+                       pr_debug("class %u is not L2 or L3\n", class->level);
+                       continue;
+               }
+
+               if (!cache_has_usable_cpor(class)) {
+                       pr_debug("class %u cache misses CPOR\n", class->level);
+                       continue;
+               }
+
+               if (!cpumask_equal(&class->affinity, cpu_possible_mask)) {
+                       pr_debug("class %u has missing CPUs, mask %*pb != %*pb\n", class->level,
+                                cpumask_pr_args(&class->affinity),
+                                cpumask_pr_args(cpu_possible_mask));
+                       continue;
+               }
+
+               if (class->level == 2)
+                       res = &mpam_resctrl_controls[RDT_RESOURCE_L2];
+               else
+                       res = &mpam_resctrl_controls[RDT_RESOURCE_L3];
+               res->class = class;
+       }
+}
+
 static int mpam_resctrl_control_init(struct mpam_resctrl_res *res)
 {
-       /* TODO: initialise the resctrl resources */
+       struct mpam_class *class = res->class;
+       struct rdt_resource *r = &res->resctrl_res;
+
+       switch (r->rid) {
+       case RDT_RESOURCE_L2:
+       case RDT_RESOURCE_L3:
+               r->schema_fmt = RESCTRL_SCHEMA_BITMAP;
+               r->cache.arch_has_sparse_bitmasks = true;
+
+               r->cache.cbm_len = class->props.cpbm_wd;
+               /* mpam_devices will reject empty bitmaps */
+               r->cache.min_cbm_bits = 1;
+
+               if (r->rid == RDT_RESOURCE_L2) {
+                       r->name = "L2";
+                       r->ctrl_scope = RESCTRL_L2_CACHE;
+                       r->cdp_capable = true;
+               } else {
+                       r->name = "L3";
+                       r->ctrl_scope = RESCTRL_L3_CACHE;
+                       r->cdp_capable = true;
+               }
+
+               /*
+                * Which bits are shared with other ...things...  Unknown
+                * devices use partid-0 which uses all the bitmap fields. Until
+                * we have configured the SMMU and GIC not to do this 'all the
+                * bits' is the correct answer here.
+                */
+               r->cache.shareable_bits = resctrl_get_default_ctrl(r);
+               r->alloc_capable = true;
+               break;
+       default:
+               return -EINVAL;
+       }
 
        return 0;
 }
@@ -292,7 +378,8 @@ int mpam_resctrl_setup(void)
                res->resctrl_res.rid = rid;
        }
 
-       /* TODO: pick MPAM classes to map to resctrl resources */
+       /* Find some classes to use for controls */
+       mpam_resctrl_pick_caches();
 
        /* Initialise the resctrl structures from the classes */
        for_each_mpam_resctrl_control(res, rid) {