drm/amd/pm: Update SMUv13.0.6 partition metrics

For SMU v13.0.6 SOCs, move to partition metrics v1.1 schema

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index 5561167121714d0f7bc9b900b3a5591c96c161b7..de4c944885f6f92ee27045bf871b38a10f5ad232 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -2654,7 +2654,7 @@ static ssize_t smu_v13_0_6_get_xcp_metrics(struct smu_context *smu, int xcp_id,
 {
        const u8 num_jpeg_rings = AMDGPU_MAX_JPEG_RINGS_4_0_3;
        int version = smu_v13_0_6_get_metrics_version(smu);
-       struct amdgpu_partition_metrics_v1_0 *xcp_metrics;
+       struct smu_v13_0_6_partition_metrics *xcp_metrics;
        MetricsTableV0_t *metrics_v0 __free(kfree) = NULL;
        struct amdgpu_device *adev = smu->adev;
        int ret, inst, i, j, k, idx;
@@ -2674,8 +2674,8 @@ static ssize_t smu_v13_0_6_get_xcp_metrics(struct smu_context *smu, int xcp_id,
        if (i == adev->xcp_mgr->num_xcps)
                return -EINVAL;
 
-       xcp_metrics = (struct amdgpu_partition_metrics_v1_0 *)table;
-       smu_cmn_init_partition_metrics(xcp_metrics, 1, 0);
+       xcp_metrics = (struct smu_v13_0_6_partition_metrics *)table;
+       smu_v13_0_6_partition_metrics_init(xcp_metrics, 1, 1);
 
        metrics_v0 = kzalloc(METRICS_TABLE_SIZE, GFP_KERNEL);
        if (!metrics_v0)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h
index 86d82044a255d3670aa4fb72f6e53fbfce1b5e22..ba865ae7eca2a436c6ae24fb4de19b858904bf24 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h
@@ -219,6 +219,41 @@ void smu_v13_0_12_get_gpu_metrics(struct smu_context *smu, void **table,
                                  void *smu_metrics,
                                  struct smu_v13_0_6_gpu_metrics *gpu_metrics);
 
+#define SMU_13_0_6_PARTITION_METRICS_FIELDS(SMU_SCALAR, SMU_ARRAY)             \
+       SMU_ARRAY(SMU_MATTR(CURRENT_GFXCLK), SMU_MUNIT(CLOCK_1),               \
+                 SMU_MTYPE(U16), current_gfxclk, SMU_13_0_6_MAX_XCC);         \
+       SMU_ARRAY(SMU_MATTR(CURRENT_SOCCLK), SMU_MUNIT(CLOCK_1),               \
+                 SMU_MTYPE(U16), current_socclk, SMU_13_0_6_MAX_CLKS);        \
+       SMU_ARRAY(SMU_MATTR(CURRENT_VCLK0), SMU_MUNIT(CLOCK_1),                \
+                 SMU_MTYPE(U16), current_vclk0, SMU_13_0_6_MAX_CLKS);         \
+       SMU_ARRAY(SMU_MATTR(CURRENT_DCLK0), SMU_MUNIT(CLOCK_1),                \
+                 SMU_MTYPE(U16), current_dclk0, SMU_13_0_6_MAX_CLKS);         \
+       SMU_SCALAR(SMU_MATTR(CURRENT_UCLK), SMU_MUNIT(CLOCK_1),                \
+                  SMU_MTYPE(U16), current_uclk);                              \
+       SMU_ARRAY(SMU_MATTR(GFX_BUSY_INST), SMU_MUNIT(PERCENT),                \
+                 SMU_MTYPE(U32), gfx_busy_inst, SMU_13_0_6_MAX_XCC);          \
+       SMU_ARRAY(SMU_MATTR(JPEG_BUSY), SMU_MUNIT(PERCENT), SMU_MTYPE(U16),    \
+                 jpeg_busy, SMU_13_0_6_MAX_JPEG);                             \
+       SMU_ARRAY(SMU_MATTR(VCN_BUSY), SMU_MUNIT(PERCENT), SMU_MTYPE(U16),     \
+                 vcn_busy, SMU_13_0_6_MAX_VCN);                               \
+       SMU_ARRAY(SMU_MATTR(GFX_BUSY_ACC), SMU_MUNIT(PERCENT), SMU_MTYPE(U64), \
+                 gfx_busy_acc, SMU_13_0_6_MAX_XCC);                           \
+       SMU_ARRAY(SMU_MATTR(GFX_BELOW_HOST_LIMIT_PPT_ACC), SMU_MUNIT(NONE),    \
+                 SMU_MTYPE(U64), gfx_below_host_limit_ppt_acc,                \
+                 SMU_13_0_6_MAX_XCC);                                         \
+       SMU_ARRAY(SMU_MATTR(GFX_BELOW_HOST_LIMIT_THM_ACC), SMU_MUNIT(NONE),    \
+                 SMU_MTYPE(U64), gfx_below_host_limit_thm_acc,                \
+                 SMU_13_0_6_MAX_XCC);                                         \
+       SMU_ARRAY(SMU_MATTR(GFX_LOW_UTILIZATION_ACC), SMU_MUNIT(NONE),         \
+                 SMU_MTYPE(U64), gfx_low_utilization_acc,                     \
+                 SMU_13_0_6_MAX_XCC);                                         \
+       SMU_ARRAY(SMU_MATTR(GFX_BELOW_HOST_LIMIT_TOTAL_ACC), SMU_MUNIT(NONE),  \
+                 SMU_MTYPE(U64), gfx_below_host_limit_total_acc,              \
+                 SMU_13_0_6_MAX_XCC);
+
+DECLARE_SMU_METRICS_CLASS(smu_v13_0_6_partition_metrics,
+                         SMU_13_0_6_PARTITION_METRICS_FIELDS);
+
 #endif /* SWSMU_CODE_LAYER_L2 */
 
 #endif