]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
wifi: rtw89: abstract getting function of DMA channel
authorPing-Ke Shih <pkshih@realtek.com>
Tue, 26 Aug 2025 08:53:39 +0000 (16:53 +0800)
committerPing-Ke Shih <pkshih@realtek.com>
Mon, 1 Sep 2025 02:55:03 +0000 (10:55 +0800)
The mapping function from QSEL (almost equivalent EDCA queue) to PCI DMA
channel. Since coming chips change the definition, abstract this function
as a chip_ops.

Don't change logic at all.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20250826085339.28512-1-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.c
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/pci.c
drivers/net/wireless/realtek/rtw89/rtw8851b.c
drivers/net/wireless/realtek/rtw89/rtw8852a.c
drivers/net/wireless/realtek/rtw89/rtw8852b.c
drivers/net/wireless/realtek/rtw89/rtw8852bt.c
drivers/net/wireless/realtek/rtw89/rtw8852c.c
drivers/net/wireless/realtek/rtw89/rtw8922a.c
drivers/net/wireless/realtek/rtw89/txrx.h

index 2b658ee89bb65d4151a211a4b1656e764607bbac..625baa0cb63c8730b1e2bfa89048d979a336310c 100644 (file)
@@ -699,6 +699,44 @@ static void rtw89_core_tx_update_llc_hdr(struct rtw89_dev *rtwdev,
        desc_info->hdr_llc_len >>= 1; /* in unit of 2 bytes */
 }
 
+u8 rtw89_core_get_ch_dma(struct rtw89_dev *rtwdev, u8 qsel)
+{
+       switch (qsel) {
+       default:
+               rtw89_warn(rtwdev, "Cannot map qsel to dma: %d\n", qsel);
+               fallthrough;
+       case RTW89_TX_QSEL_BE_0:
+       case RTW89_TX_QSEL_BE_1:
+       case RTW89_TX_QSEL_BE_2:
+       case RTW89_TX_QSEL_BE_3:
+               return RTW89_TXCH_ACH0;
+       case RTW89_TX_QSEL_BK_0:
+       case RTW89_TX_QSEL_BK_1:
+       case RTW89_TX_QSEL_BK_2:
+       case RTW89_TX_QSEL_BK_3:
+               return RTW89_TXCH_ACH1;
+       case RTW89_TX_QSEL_VI_0:
+       case RTW89_TX_QSEL_VI_1:
+       case RTW89_TX_QSEL_VI_2:
+       case RTW89_TX_QSEL_VI_3:
+               return RTW89_TXCH_ACH2;
+       case RTW89_TX_QSEL_VO_0:
+       case RTW89_TX_QSEL_VO_1:
+       case RTW89_TX_QSEL_VO_2:
+       case RTW89_TX_QSEL_VO_3:
+               return RTW89_TXCH_ACH3;
+       case RTW89_TX_QSEL_B0_MGMT:
+               return RTW89_TXCH_CH8;
+       case RTW89_TX_QSEL_B0_HI:
+               return RTW89_TXCH_CH9;
+       case RTW89_TX_QSEL_B1_MGMT:
+               return RTW89_TXCH_CH10;
+       case RTW89_TX_QSEL_B1_HI:
+               return RTW89_TXCH_CH11;
+       }
+}
+EXPORT_SYMBOL(rtw89_core_get_ch_dma);
+
 static void
 rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev,
                               struct rtw89_core_tx_request *tx_req)
@@ -712,7 +750,7 @@ rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev,
        u8 qsel, ch_dma;
 
        qsel = rtw89_core_get_qsel_mgmt(rtwdev, tx_req);
-       ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
+       ch_dma = rtw89_chip_get_ch_dma(rtwdev, qsel);
 
        desc_info->qsel = qsel;
        desc_info->ch_dma = ch_dma;
@@ -929,7 +967,7 @@ rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev,
        tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
        tid_indicate = rtw89_core_get_tid_indicate(rtwdev, tid);
        qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : rtw89_core_get_qsel(rtwdev, tid);
-       ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
+       ch_dma = rtw89_chip_get_ch_dma(rtwdev, qsel);
 
        desc_info->ch_dma = ch_dma;
        desc_info->tid_indicate = tid_indicate;
@@ -1079,7 +1117,7 @@ void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel)
 {
        u8 ch_dma;
 
-       ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
+       ch_dma = rtw89_chip_get_ch_dma(rtwdev, qsel);
 
        rtw89_hci_tx_kick_off(rtwdev, ch_dma);
 }
@@ -3664,7 +3702,7 @@ static u32 rtw89_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 tid)
        u8 qsel, ch_dma;
 
        qsel = rtw89_core_get_qsel(rtwdev, tid);
-       ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel);
+       ch_dma = rtw89_chip_get_ch_dma(rtwdev, qsel);
 
        return rtw89_hci_check_and_reclaim_tx_resource(rtwdev, ch_dma);
 }
index a5fef3c84b20852abdd825fdc2493d211c7ba15c..22f7fb30ff96808b50c7770f22e67efaa4a36830 100644 (file)
@@ -3760,6 +3760,7 @@ struct rtw89_chip_ops {
        void (*fill_txdesc_fwcmd)(struct rtw89_dev *rtwdev,
                                  struct rtw89_tx_desc_info *desc_info,
                                  void *txdesc);
+       u8 (*get_ch_dma)(struct rtw89_dev *rtwdev, u8 qsel);
        int (*cfg_ctrl_path)(struct rtw89_dev *rtwdev, bool wl);
        int (*mac_cfg_gnt)(struct rtw89_dev *rtwdev,
                           const struct rtw89_mac_ax_coex_gnt *gnt_cfg);
@@ -7197,6 +7198,14 @@ void rtw89_chip_fill_txdesc_fwcmd(struct rtw89_dev *rtwdev,
        chip->ops->fill_txdesc_fwcmd(rtwdev, desc_info, txdesc);
 }
 
+static inline
+u8 rtw89_chip_get_ch_dma(struct rtw89_dev *rtwdev, u8 qsel)
+{
+       const struct rtw89_chip_info *chip = rtwdev->chip;
+
+       return chip->ops->get_ch_dma(rtwdev, qsel);
+}
+
 static inline
 void rtw89_chip_mac_cfg_gnt(struct rtw89_dev *rtwdev,
                            const struct rtw89_mac_ax_coex_gnt *gnt_cfg)
@@ -7441,6 +7450,7 @@ void rtw89_core_fill_txdesc_fwcmd_v1(struct rtw89_dev *rtwdev,
 void rtw89_core_fill_txdesc_fwcmd_v2(struct rtw89_dev *rtwdev,
                                     struct rtw89_tx_desc_info *desc_info,
                                     void *txdesc);
+u8 rtw89_core_get_ch_dma(struct rtw89_dev *rtwdev, u8 qsel);
 void rtw89_core_rx(struct rtw89_dev *rtwdev,
                   struct rtw89_rx_desc_info *desc_info,
                   struct sk_buff *skb);
index 1316671cb31bb0e2c2228da58c16f9d5ca526d0e..b0c2ad22cbb3a03d571edd4d01e1cd93e4478a2f 100644 (file)
@@ -576,7 +576,7 @@ void rtw89_pci_parse_rpp(struct rtw89_dev *rtwdev, void *_rpp,
        rpp_info->seq = le32_get_bits(rpp->dword, RTW89_PCI_RPP_SEQ);
        rpp_info->qsel = le32_get_bits(rpp->dword, RTW89_PCI_RPP_QSEL);
        rpp_info->tx_status = le32_get_bits(rpp->dword, RTW89_PCI_RPP_TX_STATUS);
-       rpp_info->txch = rtw89_core_get_ch_dma(rtwdev, rpp_info->qsel);
+       rpp_info->txch = rtw89_chip_get_ch_dma(rtwdev, rpp_info->qsel);
 }
 EXPORT_SYMBOL(rtw89_pci_parse_rpp);
 
index 084bbf9ecf0bdab9c29da0cbd3f78cf0d9ae65c1..edcbda124916c0d909fc2ff3ce3584bcf3210672 100644 (file)
@@ -2537,6 +2537,7 @@ static const struct rtw89_chip_ops rtw8851b_chip_ops = {
        .query_rxdesc           = rtw89_core_query_rxdesc,
        .fill_txdesc            = rtw89_core_fill_txdesc,
        .fill_txdesc_fwcmd      = rtw89_core_fill_txdesc,
+       .get_ch_dma             = rtw89_core_get_ch_dma,
        .cfg_ctrl_path          = rtw89_mac_cfg_ctrl_path,
        .mac_cfg_gnt            = rtw89_mac_cfg_gnt,
        .stop_sch_tx            = rtw89_mac_stop_sch_tx,
index d4200246eeccab63d96a1a1589cbf4be673dac40..232f4c1bee1babfbef7610efac9ce4c8124338dd 100644 (file)
@@ -2178,6 +2178,7 @@ static const struct rtw89_chip_ops rtw8852a_chip_ops = {
        .query_rxdesc           = rtw89_core_query_rxdesc,
        .fill_txdesc            = rtw89_core_fill_txdesc,
        .fill_txdesc_fwcmd      = rtw89_core_fill_txdesc,
+       .get_ch_dma             = rtw89_core_get_ch_dma,
        .cfg_ctrl_path          = rtw89_mac_cfg_ctrl_path,
        .mac_cfg_gnt            = rtw89_mac_cfg_gnt,
        .stop_sch_tx            = rtw89_mac_stop_sch_tx,
index 6f33f6db27632ecbe65de1fc7fd902356792ea9b..0777e336aaa1d6ad48a57c517da5e356d04081d9 100644 (file)
@@ -842,6 +842,7 @@ static const struct rtw89_chip_ops rtw8852b_chip_ops = {
        .query_rxdesc           = rtw89_core_query_rxdesc,
        .fill_txdesc            = rtw89_core_fill_txdesc,
        .fill_txdesc_fwcmd      = rtw89_core_fill_txdesc,
+       .get_ch_dma             = rtw89_core_get_ch_dma,
        .cfg_ctrl_path          = rtw89_mac_cfg_ctrl_path,
        .mac_cfg_gnt            = rtw89_mac_cfg_gnt,
        .stop_sch_tx            = rtw89_mac_stop_sch_tx,
index 9427823aca2fba584f0f432a912e76e7001fa4d6..b3a79ebc7e754ab03e281952fe128c697b12084e 100644 (file)
@@ -708,6 +708,7 @@ static const struct rtw89_chip_ops rtw8852bt_chip_ops = {
        .query_rxdesc           = rtw89_core_query_rxdesc,
        .fill_txdesc            = rtw89_core_fill_txdesc,
        .fill_txdesc_fwcmd      = rtw89_core_fill_txdesc,
+       .get_ch_dma             = rtw89_core_get_ch_dma,
        .cfg_ctrl_path          = rtw89_mac_cfg_ctrl_path,
        .mac_cfg_gnt            = rtw89_mac_cfg_gnt,
        .stop_sch_tx            = rtw89_mac_stop_sch_tx,
index b0418e89802f5ee0e6164dccf7be5bf79a5b92c6..440801d633437d0a71838b8b2a257b28e470280c 100644 (file)
@@ -2962,6 +2962,7 @@ static const struct rtw89_chip_ops rtw8852c_chip_ops = {
        .query_rxdesc           = rtw89_core_query_rxdesc,
        .fill_txdesc            = rtw89_core_fill_txdesc_v1,
        .fill_txdesc_fwcmd      = rtw89_core_fill_txdesc_fwcmd_v1,
+       .get_ch_dma             = rtw89_core_get_ch_dma,
        .cfg_ctrl_path          = rtw89_mac_cfg_ctrl_path_v1,
        .mac_cfg_gnt            = rtw89_mac_cfg_gnt_v1,
        .stop_sch_tx            = rtw89_mac_stop_sch_tx_v1,
index d7d09d83225267335184c4f706677305491ed0fd..8eb0cb9bb23e4604d10d5fc2d2ca680ddf700025 100644 (file)
@@ -2817,6 +2817,7 @@ static const struct rtw89_chip_ops rtw8922a_chip_ops = {
        .query_rxdesc           = rtw89_core_query_rxdesc_v2,
        .fill_txdesc            = rtw89_core_fill_txdesc_v2,
        .fill_txdesc_fwcmd      = rtw89_core_fill_txdesc_fwcmd_v2,
+       .get_ch_dma             = rtw89_core_get_ch_dma,
        .cfg_ctrl_path          = rtw89_mac_cfg_ctrl_path_v2,
        .mac_cfg_gnt            = rtw89_mac_cfg_gnt_v2,
        .stop_sch_tx            = rtw89_mac_stop_sch_tx_v2,
index ec01bfc363da3bd09202431936ef4d538297cac9..82d6874337b55764495ba3c9aa8272714f40eccf 100644 (file)
@@ -732,43 +732,6 @@ rtw89_core_get_qsel_mgmt(struct rtw89_dev *rtwdev, struct rtw89_core_tx_request
                return RTW89_TX_QSEL_B0_MGMT;
 }
 
-static inline u8 rtw89_core_get_ch_dma(struct rtw89_dev *rtwdev, u8 qsel)
-{
-       switch (qsel) {
-       default:
-               rtw89_warn(rtwdev, "Cannot map qsel to dma: %d\n", qsel);
-               fallthrough;
-       case RTW89_TX_QSEL_BE_0:
-       case RTW89_TX_QSEL_BE_1:
-       case RTW89_TX_QSEL_BE_2:
-       case RTW89_TX_QSEL_BE_3:
-               return RTW89_TXCH_ACH0;
-       case RTW89_TX_QSEL_BK_0:
-       case RTW89_TX_QSEL_BK_1:
-       case RTW89_TX_QSEL_BK_2:
-       case RTW89_TX_QSEL_BK_3:
-               return RTW89_TXCH_ACH1;
-       case RTW89_TX_QSEL_VI_0:
-       case RTW89_TX_QSEL_VI_1:
-       case RTW89_TX_QSEL_VI_2:
-       case RTW89_TX_QSEL_VI_3:
-               return RTW89_TXCH_ACH2;
-       case RTW89_TX_QSEL_VO_0:
-       case RTW89_TX_QSEL_VO_1:
-       case RTW89_TX_QSEL_VO_2:
-       case RTW89_TX_QSEL_VO_3:
-               return RTW89_TXCH_ACH3;
-       case RTW89_TX_QSEL_B0_MGMT:
-               return RTW89_TXCH_CH8;
-       case RTW89_TX_QSEL_B0_HI:
-               return RTW89_TXCH_CH9;
-       case RTW89_TX_QSEL_B1_MGMT:
-               return RTW89_TXCH_CH10;
-       case RTW89_TX_QSEL_B1_HI:
-               return RTW89_TXCH_CH11;
-       }
-}
-
 static inline u8 rtw89_core_get_tid_indicate(struct rtw89_dev *rtwdev, u8 tid)
 {
        switch (tid) {