]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
Move C++ SVE tests to g++.target/aarch64/sve
authorRichard Sandiford <richard.sandiford@linaro.org>
Tue, 8 May 2018 11:42:15 +0000 (11:42 +0000)
committerRichard Sandiford <rsandifo@gcc.gnu.org>
Tue, 8 May 2018 11:42:15 +0000 (11:42 +0000)
2018-05-08  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/testsuite/
* g++.dg/other/sve_const_pred_1.C: Rename to...
* g++.target/aarch64/sve/const_pred_1.C: ...this.  Remove aarch64
target selectors and explicit -march options.
* g++.dg/other/sve_const_pred_2.C: Rename to...
* g++.target/aarch64/sve/const_pred_2.C: ...this and adjust likewise.
* g++.dg/other/sve_const_pred_3.C: Rename to...
* g++.target/aarch64/sve/const_pred_3.C: ...this and adjust likewise.
* g++.dg/other/sve_const_pred_4.C: Rename to...
* g++.target/aarch64/sve/const_pred_4.C: ...this and adjust likewise.
* g++.dg/other/sve_tls_2.C: Rename to...
* g++.target/aarch64/sve/tls_2.C: ...this and adjust likewise.
* g++.dg/other/sve_vcond_1.C: Rename to...
* g++.target/aarch64/sve/vcond_1.C: ...this and adjust likewise.
* g++.dg/other/sve_vcond_1_run.C: Rename to...
* g++.target/aarch64/sve/vcond_1_run.C: ...this and adjust likewise.

From-SVN: r260038

gcc/testsuite/ChangeLog
gcc/testsuite/g++.target/aarch64/sve/const_pred_1.C [moved from gcc/testsuite/g++.dg/other/sve_const_pred_1.C with 78% similarity]
gcc/testsuite/g++.target/aarch64/sve/const_pred_2.C [moved from gcc/testsuite/g++.dg/other/sve_const_pred_2.C with 75% similarity]
gcc/testsuite/g++.target/aarch64/sve/const_pred_3.C [moved from gcc/testsuite/g++.dg/other/sve_const_pred_3.C with 73% similarity]
gcc/testsuite/g++.target/aarch64/sve/const_pred_4.C [moved from gcc/testsuite/g++.dg/other/sve_const_pred_4.C with 72% similarity]
gcc/testsuite/g++.target/aarch64/sve/tls_2.C [moved from gcc/testsuite/g++.dg/other/sve_tls_2.C with 85% similarity]
gcc/testsuite/g++.target/aarch64/sve/vcond_1.C [moved from gcc/testsuite/g++.dg/other/sve_vcond_1.C with 99% similarity]
gcc/testsuite/g++.target/aarch64/sve/vcond_1_run.C [moved from gcc/testsuite/g++.dg/other/sve_vcond_1_run.C with 88% similarity]

index 5393aab0fe3861be621fc566ad019c1cc8a800e7..2628d55dc237a7a470e2343f385d9a6d2adfcd97 100644 (file)
@@ -1,3 +1,21 @@
+2018-05-08  Richard Sandiford  <richard.sandiford@linaro.org>
+
+       * g++.dg/other/sve_const_pred_1.C: Rename to...
+       * g++.target/aarch64/sve/const_pred_1.C: ...this.  Remove aarch64
+       target selectors and explicit -march options.
+       * g++.dg/other/sve_const_pred_2.C: Rename to...
+       * g++.target/aarch64/sve/const_pred_2.C: ...this and adjust likewise.
+       * g++.dg/other/sve_const_pred_3.C: Rename to...
+       * g++.target/aarch64/sve/const_pred_3.C: ...this and adjust likewise.
+       * g++.dg/other/sve_const_pred_4.C: Rename to...
+       * g++.target/aarch64/sve/const_pred_4.C: ...this and adjust likewise.
+       * g++.dg/other/sve_tls_2.C: Rename to...
+       * g++.target/aarch64/sve/tls_2.C: ...this and adjust likewise.
+       * g++.dg/other/sve_vcond_1.C: Rename to...
+       * g++.target/aarch64/sve/vcond_1.C: ...this and adjust likewise.
+       * g++.dg/other/sve_vcond_1_run.C: Rename to...
+       * g++.target/aarch64/sve/vcond_1_run.C: ...this and adjust likewise.
+
 2018-05-08  Richard Sandiford  <richard.sandiford@linaro.org>
 
        PR testsuite/85586
similarity index 78%
rename from gcc/testsuite/g++.dg/other/sve_const_pred_1.C
rename to gcc/testsuite/g++.target/aarch64/sve/const_pred_1.C
index cc124c06ee571d8189ade53c193db5334645173b..25b7663273fef57f2c6bec58d534d3a1873f3100 100644 (file)
@@ -1,5 +1,5 @@
-/* { dg-do compile { target aarch64*-*-* } } */
-/* { dg-options "-O2 -march=armv8.2-a+sve -msve-vector-bits=256" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -msve-vector-bits=256" } */
 
 #include <stdint.h>
 
similarity index 75%
rename from gcc/testsuite/g++.dg/other/sve_const_pred_2.C
rename to gcc/testsuite/g++.target/aarch64/sve/const_pred_2.C
index e3bce397cbf2061f3cf471739a9686fc6914a33b..4c781ca560c4788fa754c87d1e111d70a2ed91ab 100644 (file)
@@ -1,5 +1,5 @@
-/* { dg-do compile { target aarch64*-*-* } } */
-/* { dg-options "-O2 -march=armv8.2-a+sve -msve-vector-bits=256" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -msve-vector-bits=256" } */
 
 #include <stdint.h>
 
similarity index 73%
rename from gcc/testsuite/g++.dg/other/sve_const_pred_3.C
rename to gcc/testsuite/g++.target/aarch64/sve/const_pred_3.C
index 9e75f399e4b38b93394baec677bd720fb6b6b40d..6196ee05be7b14ed59bec8327278a596b6e1df37 100644 (file)
@@ -1,5 +1,5 @@
-/* { dg-do compile { target aarch64*-*-* } } */
-/* { dg-options "-O2 -march=armv8.2-a+sve -msve-vector-bits=256" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -msve-vector-bits=256" } */
 
 #include <stdint.h>
 
similarity index 72%
rename from gcc/testsuite/g++.dg/other/sve_const_pred_4.C
rename to gcc/testsuite/g++.target/aarch64/sve/const_pred_4.C
index 04a13513380507841aa4de3e7303c7d42a7b18ca..2bdf67fd03861b26c83371a77ddc10992ffa09b5 100644 (file)
@@ -1,5 +1,5 @@
-/* { dg-do compile { target aarch64*-*-* } } */
-/* { dg-options "-O2 -march=armv8.2-a+sve -msve-vector-bits=256" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -msve-vector-bits=256" } */
 
 #include <stdint.h>
 
similarity index 85%
rename from gcc/testsuite/g++.dg/other/sve_tls_2.C
rename to gcc/testsuite/g++.target/aarch64/sve/tls_2.C
index ed4689353ae75da5256047e1ce6ad46d912ca3d4..9267f1e92d13e7fe339c8698844005edc4e0be8f 100644 (file)
@@ -1,6 +1,6 @@
-/* { dg-do compile { target aarch64*-*-* } } */
+/* { dg-do compile } */
 /* { dg-require-effective-target tls } */
-/* { dg-options "-O2 -march=armv8.2-a+sve -fPIC -msve-vector-bits=256" } */
+/* { dg-options "-O2 -fPIC -msve-vector-bits=256" } */
 
 #include <stdint.h>
 
similarity index 99%
rename from gcc/testsuite/g++.dg/other/sve_vcond_1.C
rename to gcc/testsuite/g++.target/aarch64/sve/vcond_1.C
index c1ad0b91b0cb6ad038411061f292d9063eb37f5a..2a80d21abb943a74f5fcdfddfd5f50fcdadcce6e 100644 (file)
@@ -1,5 +1,5 @@
 /* { dg-do assemble { target { aarch64_asm_sve_ok && { ! ilp32 } } } } */
-/* { dg-options "-march=armv8.2-a+sve -O -msve-vector-bits=256 --save-temps" } */
+/* { dg-options "-O -msve-vector-bits=256 --save-temps" } */
 
 typedef __INT8_TYPE__ vnx16qi __attribute__((vector_size(32)));
 typedef __INT16_TYPE__ vnx8hi __attribute__((vector_size(32)));
similarity index 88%
rename from gcc/testsuite/g++.dg/other/sve_vcond_1_run.C
rename to gcc/testsuite/g++.target/aarch64/sve/vcond_1_run.C
index b542356dbf8d202fc587562e63790630a006e398..d01745e6864758ec6b0c880f5436052fed3b156b 100644 (file)
@@ -1,6 +1,6 @@
 /* { dg-do run { target aarch64_sve_hw } } */
-/* { dg-options "-O -march=armv8.2-a+sve" } */
-/* { dg-options "-O -march=armv8.2-a+sve -msve-vector-bits=256" { target aarch64_sve256_hw } } */
+/* { dg-options "-O" } */
+/* { dg-options "-O -msve-vector-bits=256" { target aarch64_sve256_hw } } */
 
 #include "sve_vcond_1.c"