]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: st: enable ethernet1 controller on stm32mp257f-ev1
authorGatien Chevallier <gatien.chevallier@foss.st.com>
Thu, 4 Sep 2025 07:40:58 +0000 (09:40 +0200)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Mon, 15 Sep 2025 15:51:31 +0000 (17:51 +0200)
ethernet1 controller is connected to the RTL8211F-CG Realtek PHY in
RGMII mode. It can either be used as a standalone Ethernet controller
or be connected to the internal TSN capable switch. For this board,
keep the standalone setup. Also enable this peripheral on the
stm32mp257f-ev1 board.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Link: https://lore.kernel.org/r/20250904-mp2_ethernet-v2-3-05a060157fb7@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm64/boot/dts/st/stm32mp257f-ev1.dts

index 9e0e4da17b399fff07c6a394bea4435e94553b53..6e165073f7329d8ef14d91dd11b0f1f10a3c1878 100644 (file)
@@ -19,6 +19,7 @@
 
        aliases {
                ethernet0 = &ethernet2;
+               ethernet1 = &ethernet1;
                serial0 = &usart2;
                serial1 = &usart6;
        };
        };
 };
 
+&ethernet1 {
+       pinctrl-0 = <&eth1_rgmii_pins_a &eth1_mdio_pins_a>;
+       pinctrl-1 = <&eth1_rgmii_sleep_pins_a &eth1_mdio_sleep_pins_a>;
+       pinctrl-names = "default", "sleep";
+       phy-handle = <&phy1_eth1>;
+       phy-mode = "rgmii-id";
+       st,ext-phyclk;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "snps,dwmac-mdio";
+               phy1_eth1: ethernet-phy@4 {
+                       compatible = "ethernet-phy-id001c.c916";
+                       reg = <4>;
+                       reset-gpios =  <&gpioj 9 GPIO_ACTIVE_LOW>;
+                       reset-assert-us = <10000>;
+                       reset-deassert-us = <80000>;
+               };
+       };
+};
+
 &ethernet2 {
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&eth2_rgmii_pins_a>;