PCI: keystone: Use quirk to limit MRRS for K2G

[ Upstream commit 148e340c0696369fadbbddc8f4bef801ed247d71 ]

PCI controller in K2G also has a limitation that memory read request
size (MRRS) must not exceed 256 bytes. Use the quirk to limit MRRS
(added for K2HK, K2L and K2E) for K2G as well.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
index 5e199e7d2d4fd12ea3d29d1153f01a033ce1c9b2..765357b87ff695624e9feff0c4b47953fcf0ecb9 100644 (file)
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -36,6 +36,7 @@
 #define PCIE_RC_K2HK           0xb008
 #define PCIE_RC_K2E            0xb009
 #define PCIE_RC_K2L            0xb00a
+#define PCIE_RC_K2G            0xb00b
 
 #define to_keystone_pcie(x)    dev_get_drvdata((x)->dev)
 
@@ -50,6 +51,8 @@ static void quirk_limit_mrrs(struct pci_dev *dev)
                 .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
                { PCI_DEVICE(PCI_VENDOR_ID_TI, PCIE_RC_K2L),
                 .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
+               { PCI_DEVICE(PCI_VENDOR_ID_TI, PCIE_RC_K2G),
+                .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, },
                { 0, },
        };