mips.md (define_attr type): Add condmove.

	* config/mips/mips.md (define_attr type): Add condmove.  Use it for
	the conditional move patterns.
	* config/mips/5400.md (ir_vr54_move): Rename to ir_vr54_condmove.
	Check for condmove type.
	(ir_vr54_arith): Add move type.
	* config/mips/5500.md (ir_vr55_move, ir_vr55_arith): Likewise.
	* config/mips/sr71k.md (ir_sr70_move, ir_sr70_arith): Likewise.

From-SVN: r69389

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0b94a6e1b862442b4d0ea4baf6af921386620b25..d0fbb13128daf66d3d2f6701577c703ab1103089 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2003-07-15  Richard Sandiford  <rsandifo@redhat.com>
+
+       * config/mips/mips.md (define_attr type): Add condmove.  Use it for
+       the conditional move patterns.
+       * config/mips/5400.md (ir_vr54_move): Rename to ir_vr54_condmove.
+       Check for condmove type.
+       (ir_vr54_arith): Add move type.
+       * config/mips/5500.md (ir_vr55_move, ir_vr55_arith): Likewise.
+       * config/mips/sr71k.md (ir_sr70_move, ir_sr70_arith): Likewise.
+
 2003-07-15  Neil Booth  <neil@daikokuya.co.uk>
 
        * c-opts.c (print_help): Remove.

diff --git a/gcc/config/mips/5400.md b/gcc/config/mips/5400.md
index 6934b7433df8d5e3d1c6e62ddf46f5054f4fa77e..70386fc518b1d91144384e11b263a761f3863fc1 100644 (file)
--- a/gcc/config/mips/5400.md
+++ b/gcc/config/mips/5400.md
@@ -44,11 +44,10 @@
 
 
 ;; This reservation is for conditional move based on integer
-;; or floating point CC.  This could probably use some refinement
-;; as "move" type attr seems to be overloaded in rtl.
-(define_insn_reservation "ir_vr54_move" 4
+;; or floating point CC.
+(define_insn_reservation "ir_vr54_condmove" 4
   (and (eq_attr "cpu" "r5400")
-       (eq_attr "type" "move"))
+       (eq_attr "type" "condmove"))
   "vr54_dp0|vr54_dp1")
 
 ;; Move to/from FPU registers
@@ -64,7 +63,7 @@
 
 (define_insn_reservation "ir_vr54_arith" 1
   (and (eq_attr "cpu" "r5400")
-       (eq_attr "type" "arith,darith,const,icmp,nop"))
+       (eq_attr "type" "move,arith,darith,const,icmp,nop"))
   "vr54_dp0|vr54_dp1")
 
 (define_insn_reservation "ir_vr54_imul_si" 3

diff --git a/gcc/config/mips/5500.md b/gcc/config/mips/5500.md
index dc85356d98b887c6350fd84c8622eec0b0293d24..0abee1741c295c9347f9d2618e9024c7729eb298 100644 (file)
--- a/gcc/config/mips/5500.md
+++ b/gcc/config/mips/5500.md
@@ -37,11 +37,10 @@
   "vr55_mem")
 
 ;; This reservation is for conditional move based on integer
-;; or floating point CC.  This could probably use some refinement
-;; as "move" type attr seems to be overloaded in rtl.
-(define_insn_reservation "ir_vr55_move" 2
+;; or floating point CC.
+(define_insn_reservation "ir_vr55_condmove" 2
   (and (eq_attr "cpu" "r5500")
-       (eq_attr "type" "move"))
+       (eq_attr "type" "condmove"))
   "vr55_dp0|vr55_dp1")
 
 ;; Move to/from FPU registers
@@ -57,7 +56,7 @@
 
 (define_insn_reservation "ir_vr55_arith" 1
   (and (eq_attr "cpu" "r5500")
-       (eq_attr "type" "arith,darith,const,icmp,nop"))
+       (eq_attr "type" "move,arith,darith,const,icmp,nop"))
   "vr55_dp0|vr55_dp1")
 
 (define_insn_reservation "ir_vr55_imul_si" 3

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index d30f4690e2f4e922e89423e2e9f2639c0ea8e1bd..efb0231ae806f4327481bca20a93f71d076bd08a 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -100,6 +100,7 @@
 ;; store       store instruction(s)
 ;; prefetch    memory prefetch
 ;; move                data movement within same register set
+;; condmove    conditional moves
 ;; xfer                transfer to/from coprocessor
 ;; hilo                transfer of hi/lo registers
 ;; arith       integer arithmetic instruction
@@ -122,7 +123,7 @@
 ;; multi       multiword sequence (or user asm statements)
 ;; nop         no operation
 (define_attr "type"
-  "unknown,branch,jump,call,load,store,prefetch,move,xfer,hilo,const,arith,darith,imul,imadd,idiv,icmp,fadd,fmul,fmadd,fdiv,fabs,fneg,fcmp,fcvt,fsqrt,frsqrt,multi,nop"
+  "unknown,branch,jump,call,load,store,prefetch,move,condmove,xfer,hilo,const,arith,darith,imul,imadd,idiv,icmp,fadd,fmul,fmadd,fdiv,fabs,fneg,fcmp,fcvt,fsqrt,frsqrt,multi,nop"
   (cond [(eq_attr "jal" "!unset")
         (const_string "call")]
        (const_string "unknown")))
@@ -8764,7 +8765,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%B4\\t%0,%z2,%1
     mov%b4\\t%0,%z3,%1"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "SI")])
 
 (define_insn ""
@@ -8779,7 +8780,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%B4\\t%0,%z2,%1
     mov%b4\\t%0,%z3,%1"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "SI")])
 
 (define_insn ""
@@ -8795,7 +8796,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%T3\\t%0,%z1,%4
     mov%t3\\t%0,%z2,%4"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "SI")])
 
 (define_insn ""
@@ -8810,7 +8811,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%B4\\t%0,%z2,%1
     mov%b4\\t%0,%z3,%1"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "DI")])
 
 (define_insn ""
@@ -8825,7 +8826,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%B4\\t%0,%z2,%1
     mov%b4\\t%0,%z3,%1"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "DI")])
 
 (define_insn ""
@@ -8841,7 +8842,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%T3\\t%0,%z1,%4
     mov%t3\\t%0,%z2,%4"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "DI")])
 
 (define_insn ""
@@ -8856,7 +8857,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%B4.s\\t%0,%2,%1
     mov%b4.s\\t%0,%3,%1"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "SF")])
 
 (define_insn ""
@@ -8871,7 +8872,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%B4.s\\t%0,%2,%1
     mov%b4.s\\t%0,%3,%1"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "SF")])
 
 (define_insn ""
@@ -8887,7 +8888,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%T3.s\\t%0,%1,%4
     mov%t3.s\\t%0,%2,%4"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "SF")])
 
 (define_insn ""
@@ -8902,7 +8903,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%B4.d\\t%0,%2,%1
     mov%b4.d\\t%0,%3,%1"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "DF")])
 
 (define_insn ""
@@ -8917,7 +8918,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%B4.d\\t%0,%2,%1
     mov%b4.d\\t%0,%3,%1"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "DF")])
 
 (define_insn ""
@@ -8933,7 +8934,7 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2%/"
   "@
     mov%T3.d\\t%0,%1,%4
     mov%t3.d\\t%0,%2,%4"
-  [(set_attr "type" "move")
+  [(set_attr "type" "condmove")
    (set_attr "mode" "DF")])
 
 ;; These are the main define_expand's used to make conditional moves.

diff --git a/gcc/config/mips/sr71k.md b/gcc/config/mips/sr71k.md
index d6c7cafa083dabd2a33849f5c82230d7ddf08112..51731893dbf71390044b69c778ee45f97bcb0340 100644 (file)
--- a/gcc/config/mips/sr71k.md
+++ b/gcc/config/mips/sr71k.md
@@ -172,12 +172,11 @@
 
 
 ;; This reservation is for conditional move based on integer
-;; or floating point CC.  This could probably use some refinement
-;; as "move" type attr seems to be overloaded in rtl.
-(define_insn_reservation "ir_sr70_move"
+;; or floating point CC.
+(define_insn_reservation "ir_sr70_condmove"
                                4
                           (and (eq_attr "cpu" "sr71000")
-                               (eq_attr "type" "move"))
+                               (eq_attr "type" "condmove"))
                          "ri_insns")
 
 ;; Try to discriminate move-from-cp1 versus move-to-cp1 as latencies
@@ -206,7 +205,7 @@
 (define_insn_reservation "ir_sr70_arith"
                                1
                           (and (eq_attr "cpu" "sr71000")
-                               (eq_attr "type" "arith,darith,const"))
+                               (eq_attr "type" "move,arith,darith,const"))
                          "ri_insns")
 
 ;; emulate repeat (dispatch stall) by spending extra cycle(s) in