clk: rockchip: rk3328: fix wrong clk_ref_usb3otg parent

[ Upstream commit a9e60f1ffe1ca57d6af6a2573e2f950e76efbf5b ]

Correct the clk_ref_usb3otg parent to fix clock control for the usb3
controller on rk3328. Verified against the rk3328 trm, the rk3228h trm,
and the rk3328 usb3 phy clock map.

Fixes: fe3511ad8a1c ("clk: rockchip: add clock controller for rk3328")
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20250115012628.1035928-2-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/clk/rockchip/clk-rk3328.c b/drivers/clk/rockchip/clk-rk3328.c
index 2429b7c2a8b31f359a570fa57dd0bca25778bf5f..f021887147499ecf5cb367b2d7b946f775a6b678 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3328.c
+++ b/drivers/clk/rockchip/clk-rk3328.c
@@ -200,7 +200,7 @@ PNAME(mux_aclk_peri_pre_p)  = { "cpll_peri",
                                    "gpll_peri",
                                    "hdmiphy_peri" };
 PNAME(mux_ref_usb3otg_src_p)   = { "xin24m",
-                                   "clk_usb3otg_ref" };
+                                   "clk_ref_usb3otg_src" };
 PNAME(mux_xin24m_32k_p)                = { "xin24m",
                                    "clk_rtc32k" };
 PNAME(mux_mac2io_src_p)                = { "clk_mac2io_src",