]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
4.14-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 21 Jul 2023 07:39:41 +0000 (09:39 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 21 Jul 2023 07:39:41 +0000 (09:39 +0200)
added patches:
drm-amdgpu-fix-clearing-mappings-for-bos-that-are-always-valid-in-vm.patch
serial-atmel-don-t-enable-irqs-prematurely.patch

queue-4.14/drm-amdgpu-fix-clearing-mappings-for-bos-that-are-always-valid-in-vm.patch [new file with mode: 0644]
queue-4.14/serial-atmel-don-t-enable-irqs-prematurely.patch [new file with mode: 0644]
queue-4.14/series

diff --git a/queue-4.14/drm-amdgpu-fix-clearing-mappings-for-bos-that-are-always-valid-in-vm.patch b/queue-4.14/drm-amdgpu-fix-clearing-mappings-for-bos-that-are-always-valid-in-vm.patch
new file mode 100644 (file)
index 0000000..267d772
--- /dev/null
@@ -0,0 +1,62 @@
+From ea2c3c08554601b051d91403a241266e1cf490a5 Mon Sep 17 00:00:00 2001
+From: Samuel Pitoiset <samuel.pitoiset@gmail.com>
+Date: Fri, 16 Jun 2023 15:14:07 +0200
+Subject: drm/amdgpu: fix clearing mappings for BOs that are always valid in VM
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Samuel Pitoiset <samuel.pitoiset@gmail.com>
+
+commit ea2c3c08554601b051d91403a241266e1cf490a5 upstream.
+
+Per VM BOs must be marked as moved or otherwise their ranges are not
+updated on use which might be necessary when the replace operation
+splits mappings.
+
+This fixes random GPU hangs when replacing sparse mappings from the
+userspace, while OP_MAP/OP_UNMAP works fine because always valid BOs
+are correctly handled there.
+
+Cc: stable@vger.kernel.org
+Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c |   12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+@@ -2312,18 +2312,30 @@ int amdgpu_vm_bo_clear_mappings(struct a
+       /* Insert partial mapping before the range */
+       if (!list_empty(&before->list)) {
++              struct amdgpu_bo *bo = before->bo_va->base.bo;
++
+               amdgpu_vm_it_insert(before, &vm->va);
+               if (before->flags & AMDGPU_PTE_PRT)
+                       amdgpu_vm_prt_get(adev);
++
++              if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv &&
++                  !before->bo_va->base.moved)
++                      amdgpu_vm_bo_moved(&before->bo_va->base);
+       } else {
+               kfree(before);
+       }
+       /* Insert partial mapping after the range */
+       if (!list_empty(&after->list)) {
++              struct amdgpu_bo *bo = after->bo_va->base.bo;
++
+               amdgpu_vm_it_insert(after, &vm->va);
+               if (after->flags & AMDGPU_PTE_PRT)
+                       amdgpu_vm_prt_get(adev);
++
++              if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv &&
++                  !after->bo_va->base.moved)
++                      amdgpu_vm_bo_moved(&after->bo_va->base);
+       } else {
+               kfree(after);
+       }
diff --git a/queue-4.14/serial-atmel-don-t-enable-irqs-prematurely.patch b/queue-4.14/serial-atmel-don-t-enable-irqs-prematurely.patch
new file mode 100644 (file)
index 0000000..e145ff2
--- /dev/null
@@ -0,0 +1,45 @@
+From 27a826837ec9a3e94cc44bd9328b8289b0fcecd7 Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@linaro.org>
+Date: Mon, 19 Jun 2023 12:45:17 +0300
+Subject: serial: atmel: don't enable IRQs prematurely
+
+From: Dan Carpenter <dan.carpenter@linaro.org>
+
+commit 27a826837ec9a3e94cc44bd9328b8289b0fcecd7 upstream.
+
+The atmel_complete_tx_dma() function disables IRQs at the start
+of the function by calling spin_lock_irqsave(&port->lock, flags);
+There is no need to disable them a second time using the
+spin_lock_irq() function and, in fact, doing so is a bug because
+it will enable IRQs prematurely when we call spin_unlock_irq().
+
+Just use spin_lock/unlock() instead without disabling or enabling
+IRQs.
+
+Fixes: 08f738be88bb ("serial: at91: add tx dma support")
+Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
+Reviewed-by: Jiri Slaby <jirislaby@kernel.org>
+Acked-by: Richard Genoud <richard.genoud@gmail.com>
+Link: https://lore.kernel.org/r/cb7c39a9-c004-4673-92e1-be4e34b85368@moroto.mountain
+Cc: stable <stable@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/tty/serial/atmel_serial.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/tty/serial/atmel_serial.c
++++ b/drivers/tty/serial/atmel_serial.c
+@@ -798,11 +798,11 @@ static void atmel_complete_tx_dma(void *
+       port->icount.tx += atmel_port->tx_len;
+-      spin_lock_irq(&atmel_port->lock_tx);
++      spin_lock(&atmel_port->lock_tx);
+       async_tx_ack(atmel_port->desc_tx);
+       atmel_port->cookie_tx = -EINVAL;
+       atmel_port->desc_tx = NULL;
+-      spin_unlock_irq(&atmel_port->lock_tx);
++      spin_unlock(&atmel_port->lock_tx);
+       if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+               uart_write_wakeup(port);
index 5b024eba8adbb05f9c02060b81e9936950e3deef..ce1b1f7b639f8806f44f7d2e4ec32efca7e745ee 100644 (file)
@@ -110,3 +110,5 @@ pci-add-function-1-dma-alias-quirk-for-marvell-88se9235.patch
 misc-pci_endpoint_test-re-init-completion-for-every-test.patch
 md-raid0-add-discard-support-for-the-original-layout.patch
 fs-dlm-return-positive-pid-value-for-f_getlk.patch
+drm-amdgpu-fix-clearing-mappings-for-bos-that-are-always-valid-in-vm.patch
+serial-atmel-don-t-enable-irqs-prematurely.patch