drm/amd/pm: Disable MCLK switching on SI at high pixel clocks

On various SI GPUs, a flickering can be observed near the bottom
edge of the screen when using a single 4K 60Hz monitor over DP.
Disabling MCLK switching works around this problem.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index cf9932e68055f9df8c5809f4dda95064158e87f6..3a9522c17fee30cde924b90cb06a0fb9f01932ba 100644 (file)
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -3500,6 +3500,11 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
         * for these GPUs to calculate bandwidth requirements.
         */
        if (high_pixelclock_count) {
+               /* Work around flickering lines at the bottom edge
+                * of the screen when using a single 4K 60Hz monitor.
+                */
+               disable_mclk_switching = true;
+
                /* On Oland, we observe some flickering when two 4K 60Hz
                 * displays are connected, possibly because voltage is too low.
                 * Raise the voltage by requiring a higher SCLK.