Xilinx: ARM: SD: change divisor to speed it up

In the former change, a divisor too low seems cause problems
with the lower speed cards. This is attempt to have something
that's tolerable even if it's not the optimal.

This allows the kernel and ramdisk to be loaded reasonably
quickly.

diff --git a/board/xilinx/dfe/mmc.c b/board/xilinx/dfe/mmc.c
index 91b21db01129013c88cbe1bb3a979beb3482d58d..91d444f75ab642eafaf7fe72b90d12d35a2c70fc 100755 (executable)
--- a/board/xilinx/dfe/mmc.c
+++ b/board/xilinx/dfe/mmc.c
@@ -73,7 +73,7 @@ static void init_port(void)
        sd_out8(SD_PWR_CTRL_R, SD_POWER_33|SD_POWER_ON);
 
        /* Enable Internal clock and wait for it to stablilize */
-       clk = (0x40 << SD_DIV_SHIFT) | SD_CLK_INT_EN;
+       clk = (0x4 << SD_DIV_SHIFT) | SD_CLK_INT_EN;
        sd_out16(SD_CLK_CTL_R, clk);
        do {
                clk = sd_in16(SD_CLK_CTL_R);