]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: rockchip: add overlay for qnap-ts133 device revision
authorHeiko Stuebner <heiko@sntech.de>
Sun, 1 Feb 2026 19:18:04 +0000 (20:18 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 22 Feb 2026 22:28:50 +0000 (23:28 +0100)
TS433 devices received a board revision adding gpios for per hard-disk
presence-detection and power-control. These boards have a PCB-id of at
least 13 which can be read from an EEPROM.

The presence detection is not really necessary and there are also no
existing bindings for doing something with it. So add them as gpio hog
to at least document them and allow its state to be read from debugfs.

The power-control is modelled as regulator, with connected to the
RK3568's SATA controller as target-supply.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20260201191804.41421-5-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/Makefile
arch/arm64/boot/dts/rockchip/rk3566-qnap-ts133-pcb-13.dtso [new file with mode: 0644]

index bd0582f5d324753cffc4054390e76b0173f0f84d..89c168a651b625e59322d48b64c183e29d73d45e 100644 (file)
@@ -117,6 +117,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rgb30.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-rk2023.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-powkiddy-x55.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-qnap-ts133.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-qnap-ts133-pcb-13.dtbo
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-cm3-io.dtb
@@ -264,6 +265,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2-screen.dtb
 rk3399-rockpro64-v2-screen-dtbs := rk3399-rockpro64-v2.dtb \
        rk3399-rockpro64-screen.dtbo
 
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-qnap-ts133-pcb-13.dtb
+rk3566-qnap-ts133-pcb-13-dtbs := rk3566-qnap-ts133.dtb \
+       rk3566-qnap-ts133-pcb-13.dtbo
+
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-qnap-ts233-pcb-12-11.dtb
 rk3568-qnap-ts233-pcb-12-11-dtbs := rk3568-qnap-ts233.dtb \
        rk3568-qnap-ts233-pcb-12-11.dtbo
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-qnap-ts133-pcb-13.dtso b/arch/arm64/boot/dts/rockchip/rk3566-qnap-ts133-pcb-13.dtso
new file mode 100644 (file)
index 0000000..f9a8194
--- /dev/null
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Device tree overlay for TS133 board PCB-13 revision.
+ *
+ * Copyright (C) 2025 Heiko Stuebner <heiko@sntech.de>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+&{/} {
+       /*
+        * The default hardware-state of this gpio causes the drive
+        * to be already running when entering the kernel.
+        * regulator-boot-on is needed to prevent one additional
+        * power-cycle on the drive.
+        *
+        * With regulator-boot-on we get the expected 1 cycle
+        * per boot, without it we end up with 2 cycles as seen
+        * via smartctl.
+        */
+       hdd1_pwr: regulator-hdd1-power {
+               compatible = "regulator-fixed";
+               gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&hdd1_power_pin>;
+               regulator-name = "hdd1-power";
+               regulator-boot-on;
+               vin-supply = <&dc_12v>;
+       };
+};
+
+&gpio2 {
+       hdd1-present-hog {
+               gpios = <RK_PA2 GPIO_ACTIVE_LOW>;
+               gpio-hog;
+               input;
+               line-name = "hdd1-present";
+       };
+};
+
+&pinctrl {
+       pinctrl-names = "default";
+       pinctrl-0 = <&hdd1_present_pin>;
+
+       hdd-power {
+               hdd1_power_pin: hdd1-power-pin {
+                       rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
+       hdd-present {
+               hdd1_present_pin: hdd1-present-pin {
+                       rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+       };
+};
+
+&sata2_port0 {
+       target-supply = <&hdd1_pwr>;
+};