]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
power: supply: max17042_battery: Keep only critical alerts during suspend
authorVincent Cloutier <vincent@cloutier.co>
Mon, 6 Apr 2026 20:57:53 +0000 (16:57 -0400)
committerSebastian Reichel <sebastian.reichel@collabora.com>
Wed, 3 Jun 2026 19:30:45 +0000 (21:30 +0200)
Disable MAX17055 dSOCi while the system is suspended so state-of-charge changes do not wake the system repeatedly. Leave SALRT armed for the critical low-battery threshold and restore runtime alert handling on resume.

Signed-off-by: Vincent Cloutier <vincent@cloutier.co>
Link: https://patch.msgid.link/20260406205759.493288-6-vincent.cloutier@icloud.com
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
drivers/power/supply/max17042_battery.c

index d05202974a71ebcf333e9143b7fd343be868faf8..2110b87bdc4ba2484da295754b1fc096f9190515 100644 (file)
@@ -935,6 +935,16 @@ static void max17042_enable_soc_alerts(struct max17042_chip *chip)
        max17042_set_soc_threshold(chip, 1);
 }
 
+static void max17042_suspend_soc_alerts(struct max17042_chip *chip)
+{
+       if (chip->chip_type != MAXIM_DEVICE_TYPE_MAX17055)
+               return;
+
+       regmap_update_bits(chip->regmap, MAX17055_Config2,
+                          CFG2_DSOCI_BIT_ENBL, 0);
+       max17042_set_critical_soc_threshold(chip);
+}
+
 static irqreturn_t max17042_thread_handler(int id, void *dev)
 {
        struct max17042_chip *chip = dev;
@@ -1310,6 +1320,7 @@ static int max17042_suspend(struct device *dev)
         */
        if (chip->irq) {
                disable_irq(chip->irq);
+               max17042_suspend_soc_alerts(chip);
                enable_irq_wake(chip->irq);
        }
 
@@ -1323,8 +1334,8 @@ static int max17042_resume(struct device *dev)
        if (chip->irq) {
                disable_irq_wake(chip->irq);
                enable_irq(chip->irq);
-               /* re-program the SOC thresholds to 1% change */
-               max17042_set_soc_threshold(chip, 1);
+               /* re-arm runtime SOC alerts */
+               max17042_enable_soc_alerts(chip);
        }
 
        return 0;