phy: qcom: m31-eusb2: Fix the error log while enabling clock

While enabling clock, we incorrectly log 'ref clk' as 'cfg ahb clk'
Fix this since the devicetree bindings mentions it as ref clock.

Signed-off-by: Prashanth K <prashanth.k@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250826105254.3758803-1-prashanth.k@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c b/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c
index bf32572566c4e570794d153adfda4492b65bfbae..0a0d2d9fc846480878c19f34435ccd6df242a1bf 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c
+++ b/drivers/phy/qualcomm/phy-qcom-m31-eusb2.c
@@ -196,7 +196,7 @@ static int m31eusb2_phy_init(struct phy *uphy)
 
        ret = clk_prepare_enable(phy->clk);
        if (ret) {
-               dev_err(&uphy->dev, "failed to enable cfg ahb clock, %d\n", ret);
+               dev_err(&uphy->dev, "failed to enable ref clock, %d\n", ret);
                goto disable_repeater;
        }